Simplified pseudocode including LRu and CTR skipping, which illustrates
clearly that SVP64 Scalar Branches (VL=1) are **not** identical to
-v3.0B Scalar Branches.
+v3.0B Scalar Branches. The key areas where differences occur are in
+when and why CTR is decremented (CTRtest Mode) and whether LR is
+updated (which is unconditional in v3.0B when LK=1, and conditional
+in SVP64 when LRu=1).
```
if (mode_is_64bit) then M <- 0
if LK & lr_ok then LR <-iea CIA + 4
```
+Below is the pseudocode for SVP64 Branches, which is a little less
+obvious but identical to the above. The lack of obviousness is down
+to the early-exit opportunities.
+
Pseudocode for Horizontal-First Mode:
```