#include "ac_gpu_info.h"
#include "sid.h"
+#include "util/macros.h"
#include "util/u_math.h"
#include <stdio.h>
info->gart_page_size = alignment_info.size_remote;
if (info->chip_class == GFX6)
- info->gfx_ib_pad_with_type2 = TRUE;
+ info->gfx_ib_pad_with_type2 = true;
unsigned ib_align = 0;
ib_align = MAX2(ib_align, gfx.ib_start_alignment);
return ret;
surf->u.gfx9.dcc_retile_map[index * 2] = addrout.addr;
- if (addrout.addr > USHRT_MAX)
+ if (addrout.addr > UINT16_MAX)
surf->u.gfx9.dcc_retile_use_uint16 = false;
/* Compute dst DCC address */
return ret;
surf->u.gfx9.dcc_retile_map[index * 2 + 1] = addrout.addr;
- if (addrout.addr > USHRT_MAX)
+ if (addrout.addr > UINT16_MAX)
surf->u.gfx9.dcc_retile_use_uint16 = false;
assert(index * 2 + 1 < surf->u.gfx9.dcc_retile_num_elements);
format = radv_translate_colorformat(iview->vk_format);
if (format == V_028C70_COLOR_INVALID || ntype == ~0u)
radv_finishme("Illegal color\n");
- swap = radv_translate_colorswap(iview->vk_format, FALSE);
+ swap = radv_translate_colorswap(iview->vk_format, false);
endian = radv_colorformat_endian_swap(format);
/* blend clamp should be set for all NORM/SRGB types */