+2015-04-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
+
+ * conditions.h: Define macros even if HAVE_cc0 is undefined.
+ * emit-rtl.c: Define functions even if HAVE_cc0 is undefined.
+ * final.c: Likewise.
+ * jump.c: Likewise.
+ * recog.c: Likewise.
+ * recog.h: Declare functions even when HAVE_cc0 is undefined.
+ * sched-deps.c (sched_analyze_2): Always compile case for cc0.
+
2015-04-21 Trevor Saunders <tbsaunde+gcc@tbsaunde.org>
* defaults.h: New definition of EH_RETURN_DATA_REGNO.
#ifndef GCC_CONDITIONS_H
#define GCC_CONDITIONS_H
-/* None of the things in the files exist if we don't use CC0. */
-
-#ifdef HAVE_cc0
-
/* The variable cc_status says how to interpret the condition code.
It is set by output routines for an instruction that sets the cc's
and examined by output routines for jump instructions.
(cc_status.flags = 0, cc_status.value1 = 0, cc_status.value2 = 0, \
CC_STATUS_MDEP_INIT)
-#endif
-
#endif /* GCC_CONDITIONS_H */
return insn;
}
\f
-#ifdef HAVE_cc0
/* Return the next insn that uses CC0 after INSN, which is assumed to
set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
applied to the result of this function should yield INSN).
return insn;
}
-#endif
#ifdef AUTO_INC_DEC
/* Find a RTX_AUTOINC class rtx which matches DATA. */
static int insn_counter = 0;
-#ifdef HAVE_cc0
/* This variable contains machine-dependent flags (defined in tm.h)
set and examined by output routines
that describe how to interpret the condition codes properly. */
from before the insn. */
CC_STATUS cc_prev_status;
-#endif
/* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
&& JUMP_LABEL (insn) != NULL && !ANY_RETURN_P (JUMP_LABEL (insn)));
}
-#ifdef HAVE_cc0
-
/* Return nonzero if X is an RTX that only sets the condition codes
and has no side effects. */
}
return 0;
}
-#endif
\f
/* Find all CODE_LABELs referred to in X, and increment their use
counts. If INSN is a JUMP_INSN and there is at least one
return ((num_changes_pending () > 0) && (apply_change_group () > 0));
}
\f
-#ifdef HAVE_cc0
/* Return 1 if the insn using CC0 set by INSN does not contain
any ordered tests applied to the condition codes.
EQ and NE tests do not count. */
return (INSN_P (next)
&& ! inequality_comparisons_p (PATTERN (next)));
}
-#endif
\f
/* Return 1 if OP is a valid general operand for machine mode MODE.
This is either a register reference, a memory reference,
extern void validate_replace_src_group (rtx, rtx, rtx);
extern bool validate_simplify_insn (rtx insn);
extern int num_changes_pending (void);
-#ifdef HAVE_cc0
extern int next_insn_tests_no_inequality (rtx);
-#endif
extern bool reg_fits_class_p (const_rtx, reg_class_t, int, machine_mode);
extern int offsettable_memref_p (rtx);
return;
-#ifdef HAVE_cc0
case CC0:
+#ifndef HAVE_cc0
+ gcc_unreachable ();
+#endif
/* User of CC0 depends on immediately preceding insn. */
SCHED_GROUP_P (insn) = 1;
/* Don't move CC0 setter to another block (it can set up the
sched_deps_info->finish_rhs ();
return;
-#endif
case REG:
{