(no commit message)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index 79d0441d4b5683caf88a9924608031698eee6874..5aadeb1f1b0dabb849877903bfcd8df1462345c5 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -1020,7 +1020,12 @@ with the proposed microarchitecture: the differences however are key.
   being a bit light on L1 Cache, in favour of large ALUs and proximity
   to Memory, and require a modest amount of "helper" assistance with
   their Virtual Memory Management.
-
+* ZOLC has the transition points where PEs may take over from the CPU
+  actually embedded into the binary, and there is accompanying
+  hardware-level assistance at the ISA level.  GPUs, which have to
+  work with a wide range of commidity CPUs, cannot in any way expect
+  ARM or Intel to add support for GPU Task Scheduling directly into
+  the ARM or x86 ISAs!
 
 **Roadmap summary of Advanced SVP64**