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m68k.md: Fix constraints for bitfield instructions.
authorRichard Zidlicky <rz@linux-m68k.org>
Tue, 16 Mar 2004 03:54:33 +0000 (03:54 +0000)
committerBernardo Innocenti <bernie@gcc.gnu.org>
Tue, 16 Mar 2004 03:54:33 +0000 (04:54 +0100)
2004-03-16   Richard Zidlicky  <rz@linux-m68k.org>

* config/m68k/m68k.md: Fix constraints for bitfield instructions.
* doc/md.texi: Clarify description of "i" constraint.

From-SVN: r79523

gcc/ChangeLog patch | blob | history
gcc/config/m68k/m68k.md patch | blob | history
gcc/doc/md.texi patch | blob | history

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 479dbc6dde69322199812c2619e46a151e2e53c4..635e5ae31db5706ce84cf64a410ed973c87685ce 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2004-03-16   Richard Zidlicky  <rz@linux-m68k.org>
+
+       * config/m68k/m68k.md: Fix constraints for bitfield instructions.
+       * doc/md.texi: Clarify description of "i" constraint.
+
 2004-03-15  James E Wilson  <wilson@specifixinc.com>
 
        * config/mips/mips.md (type): Split load into load, fpload, fpidxload.
diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index f7c396c4bc7f04042ff876733ac68e68f2380f4a..e674ca2a7d73597be60ea50c152527307970a5d2 100644 (file)
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -4737,8 +4737,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
        (sign_extract:SI (match_operand:QI 1 "memory_operand" "o")
-                        (match_operand:SI 2 "general_operand" "di")
-                        (match_operand:SI 3 "general_operand" "di")))]
+                        (match_operand:SI 2 "general_operand" "dn")
+                        (match_operand:SI 3 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfexts %1{%b3:%b2},%0")
 
@@ -4753,8 +4753,8 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d")
        (zero_extract:SI (match_operand:QI 1 "memory_operand" "o,d")
-                        (match_operand:SI 2 "general_operand" "di,di")
-                        (match_operand:SI 3 "general_operand" "di,di")))]
+                        (match_operand:SI 2 "general_operand" "dn,dn")
+                        (match_operand:SI 3 "general_operand" "dn,dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (GET_CODE (operands[2]) == CONST_INT)
@@ -4771,8 +4771,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
         (xor:SI (zero_extract:SI (match_dup 0) (match_dup 1) (match_dup 2))
                (match_operand 3 "const_int_operand" "n")))]
   "TARGET_68020 && TARGET_BITFIELD
@@ -4786,8 +4786,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
        (const_int 0))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4797,8 +4797,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
        (const_int -1))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4816,8 +4816,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:QI 0 "memory_operand" "+o")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
        (match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfins %3,%0{%b2:%b1}")
@@ -4828,16 +4828,16 @@
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
        (sign_extract:SI (match_operand:SI 1 "register_operand" "d")
-                        (match_operand:SI 2 "general_operand" "di")
-                        (match_operand:SI 3 "general_operand" "di")))]
+                        (match_operand:SI 2 "general_operand" "dn")
+                        (match_operand:SI 3 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
   "bfexts %1{%b3:%b2},%0")
 
 (define_insn ""
   [(set (match_operand:SI 0 "nonimmediate_operand" "=d")
        (zero_extract:SI (match_operand:SI 1 "register_operand" "d")
-                        (match_operand:SI 2 "general_operand" "di")
-                        (match_operand:SI 3 "general_operand" "di")))]
+                        (match_operand:SI 2 "general_operand" "dn")
+                        (match_operand:SI 3 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (GET_CODE (operands[2]) == CONST_INT)
@@ -4854,8 +4854,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+d")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
        (const_int 0))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4865,8 +4865,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+d")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
        (const_int -1))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4876,8 +4876,8 @@
 
 (define_insn ""
   [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+d")
-                        (match_operand:SI 1 "general_operand" "di")
-                        (match_operand:SI 2 "general_operand" "di"))
+                        (match_operand:SI 1 "general_operand" "dn")
+                        (match_operand:SI 2 "general_operand" "dn"))
        (match_operand:SI 3 "register_operand" "d"))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
@@ -4899,7 +4899,7 @@
   [(set (cc0)
        (zero_extract:SI (match_operand:QI 0 "memory_operand" "o")
                         (match_operand:SI 1 "const_int_operand" "n")
-                        (match_operand:SI 2 "general_operand" "di")))]
+                        (match_operand:SI 2 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (operands[1] == const1_rtx
@@ -4924,7 +4924,7 @@
   [(set (cc0)
        (zero_extract:SI (match_operand:SI 0 "register_operand" "d")
                         (match_operand:SI 1 "const_int_operand" "n")
-                        (match_operand:SI 2 "general_operand" "di")))]
+                        (match_operand:SI 2 "general_operand" "dn")))]
   "TARGET_68020 && TARGET_BITFIELD"
 {
   if (operands[1] == const1_rtx
diff --git a/gcc/doc/md.texi b/gcc/doc/md.texi
index a543080967c98bd13c213d9171b3b28bb7ce6433..f1f8dae1e52073cd9f33a74932f41f557bdd6890 100644 (file)
--- a/gcc/doc/md.texi
+++ b/gcc/doc/md.texi
@@ -800,7 +800,7 @@ register.
 @item @samp{i}
 An immediate integer operand (one with constant value) is allowed.
 This includes symbolic constants whose values will be known only at
-assembly time.
+assembly time or later.
 
 @cindex @samp{n} in constraint
 @item @samp{n}