(no commit message)

diff --git a/openpower/sv/rfc/001.mdwn b/openpower/sv/rfc/001.mdwn
index 6d5e61cddabfa038c349e94ceb1753b8ac39d17b..246f14e0660d147ed0f9fd53aba166d17af5d668 100644 (file)
--- a/openpower/sv/rfc/001.mdwn
+++ b/openpower/sv/rfc/001.mdwn
@@ -12,6 +12,7 @@ Links
 * <https://libre-soc.org/openpower/sv/av_opcodes/>
 * <https://libre-soc.org/openpower/sv/fcvt/>
 * <https://libre-soc.org/openpower/sv/cr_int_predication/>
+* <https://libre-soc.org/openpower/sv/biginteger/>
 
 # Introduction to Simple-V
 
@@ -38,6 +39,9 @@ the **Scalar** Power ISA up-to-date.  These include IEEE754 Transcendentals
 AV cryptographic Biginteger and bitmanipulation operations that ARM Intel
 AMD and many other ISAs have been adding over the past 12 years.
 
+*Thus it becomes necesary to consider the Architectural Resource Allocation of not just
+Simple-V but the 80-100 Scalar instructions all at the same time*.
+
 # Resources