i915g: switch rendering to mipmapped textures to (x,y) offsets

Byte offsets simply don't work with tiled render targets when using
tiling bits. Luckily we can cox the hw into doing the right thing
with the DRAWING_RECT command by disabling the drawing rect offset
for the depth buffer.

Minor fixes by Jakob Bornecrantz.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Reviewed-by: Jakob Bornecrantz <wallbraker@gmail.com>
Signed-off-by: Jakob Bornecrantz <wallbraker@gmail.com>

diff --git a/src/gallium/drivers/i915/i915_reg.h b/src/gallium/drivers/i915/i915_reg.h
index 1f6d8ac76bb9aa1f865e83eac0fc5d6e8fc0b1fc..5e4e80ddf6b2504a308bb298d5dd793ac9194294 100644 (file)
--- a/src/gallium/drivers/i915/i915_reg.h
+++ b/src/gallium/drivers/i915/i915_reg.h
@@ -851,6 +851,7 @@
 #define MI_FLUSH                   ((0<<29)|(4<<23))
 #define FLUSH_MAP_CACHE            (1<<0)
 #define INHIBIT_FLUSH_RENDER_CACHE (1<<2)
+#define MI_NOOP                    0
 
 
 #define CMD_3D (0x3<<29)

diff --git a/src/gallium/drivers/i915/i915_state_emit.c b/src/gallium/drivers/i915/i915_state_emit.c
index 8d912cadc1a4dbbaea2f8dba32a19adb55ee1d54..7c430dea8bcda8a2a682f5b96c333dab1203f63a 100644 (file)
--- a/src/gallium/drivers/i915/i915_state_emit.c
+++ b/src/gallium/drivers/i915/i915_state_emit.c
@@ -248,7 +248,7 @@ i915_emit_hardware_state(struct i915_context *i915 )
 
          OUT_RELOC(tex->buffer,
                    I915_USAGE_RENDER,
-                   cbuf_surface->offset);
+                   0);
       }
 
       /* What happens if no zbuf??
@@ -405,18 +405,34 @@ i915_emit_hardware_state(struct i915_context *i915 )
 #if 01
    /* drawing surface size */
    /* 6 dwords, 0 relocs */
+   if (i915->hardware_dirty & I915_HW_STATIC)
    {
       uint w, h;
-      boolean k = framebuffer_size(&i915->framebuffer, &w, &h);
-      (void)k;
-      assert(k);
+      struct pipe_surface *cbuf_surface = i915->framebuffer.cbufs[0];
+      struct i915_texture *tex = i915_texture(cbuf_surface->texture);
+      unsigned x, y;
+      int face;
+      uint32_t draw_offset;
+      boolean ret;
+
+      ret = framebuffer_size(&i915->framebuffer, &w, &h);
+      assert(ret);
+
+      face = tex->b.b.target == PIPE_TEXTURE_CUBE ?
+               cbuf_surface->face : cbuf_surface->zslice;
+
+      x = tex->image_offset[cbuf_surface->level][face].nblocksx;
+      y = tex->image_offset[cbuf_surface->level][face].nblocksy;
 
+      draw_offset = x | (y << 16);
+
+      /* XXX flush only required when the draw_offset changes! */
+      OUT_BATCH(MI_FLUSH | INHIBIT_FLUSH_RENDER_CACHE);
       OUT_BATCH(_3DSTATE_DRAW_RECT_CMD);
-      OUT_BATCH(0);
-      OUT_BATCH(0);
-      OUT_BATCH(((w - 1) & 0xffff) | ((h - 1) << 16));
-      OUT_BATCH(0);
-      OUT_BATCH(0);
+      OUT_BATCH(DRAW_RECT_DIS_DEPTH_OFS);
+      OUT_BATCH(draw_offset);
+      OUT_BATCH((w - 1 + x) | ((h - 1 + y) << 16));
+      OUT_BATCH(draw_offset);
    }
 #endif
 

diff --git a/src/gallium/drivers/i915/i915_surface.c b/src/gallium/drivers/i915/i915_surface.c
index 3a7d9ec407c63bd0375308de753973bb9c5dea4b..8a09f930a0c483c42abb4b6bc6d87661f99744e0 100644 (file)
--- a/src/gallium/drivers/i915/i915_surface.c
+++ b/src/gallium/drivers/i915/i915_surface.c
@@ -193,6 +193,9 @@ i915_get_tex_surface(struct pipe_screen *screen,
       ps->height = u_minify(pt->height0, level);
       ps->offset = offset;
       ps->usage = flags;
+      ps->zslice = zslice;
+      ps->level = level;
+      ps->face = face;
    }
    return ps;
 }