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Mem: speed up log_fancy by using make_sim_state_dict()
author
Jacob Lifshay
<programmerjake@gmail.com>
Sun, 3 Dec 2023 08:46:01 +0000
(
00:46
-0800)
committer
Jacob Lifshay
<programmerjake@gmail.com>
Mon, 4 Dec 2023 06:32:30 +0000
(22:32 -0800)
src/openpower/decoder/isa/mem.py
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diff --git
a/src/openpower/decoder/isa/mem.py
b/src/openpower/decoder/isa/mem.py
index a5867f3d3bfa7d4623d75d72b0b8a75aaafcdeae..c4744b879f0bd693be95b24fba3ee7004e20ef97 100644
(file)
--- a/
src/openpower/decoder/isa/mem.py
+++ b/
src/openpower/decoder/isa/mem.py
@@
-268,10
+268,10
@@
class MemCommon:
return bytearray(line_size)
mem_lines = defaultdict(make_line)
subword_range = range(1 << self.word_log2)
- for k in self.word_idxs():
- addr = k << self.word_log2
- for
_
in subword_range:
- v =
self.ld(addr, width=1, reason=_ReadReason.Dump)
+ words = self.make_sim_state_dict()
+ for addr, word in words.items():
+ for
i
in subword_range:
+ v =
(word >> i * 8) & 0xFF
mem_lines[addr >> log2_line_size][addr & subline_mask] = v
addr += 1