freedreno/a5xx: fix discard

Signed-off-by: Rob Clark <robdclark@gmail.com>

diff --git a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
index edb1f4f1e43b77b7b6bf7f0801758b95c236db55..04d880816dd8f7b24d34bdf99d9f2023408b88cc 100644 (file)
--- a/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
+++ b/src/gallium/drivers/freedreno/a5xx/fd5_emit.c
@@ -285,9 +285,6 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
                OUT_PKT4(ring, REG_A5XX_RB_STENCILREFMASK, 1);
                OUT_RING(ring, zsa->rb_stencilrefmask |
                                A5XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[0]));
-
-               OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL, 1);
-               OUT_RING(ring, zsa->gras_su_depth_plane_cntl);
        }
 
        if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_RASTERIZER | FD_DIRTY_PROG)) {
@@ -299,6 +296,10 @@ fd5_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 
                OUT_PKT4(ring, REG_A5XX_RB_DEPTH_PLANE_CNTL, 1);
                OUT_RING(ring, COND(fragz, A5XX_RB_DEPTH_PLANE_CNTL_FRAG_WRITES_Z));
+
+               OUT_PKT4(ring, REG_A5XX_GRAS_SU_DEPTH_PLANE_CNTL, 1);
+               OUT_RING(ring, zsa->gras_su_depth_plane_cntl |
+                               COND(fragz, A5XX_GRAS_SU_DEPTH_PLANE_CNTL_ALPHA_TEST_ENABLE));
        }
 
        if (dirty & FD_DIRTY_RASTERIZER) {