freedreno/ir3/ra: move regs_count==0 check

Fold it in to writes_gpr() (since a register that does not reference any
registers by definition does not write a register).  This lets us avoid
having to handle this case in a few other places.

Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/src/freedreno/ir3/ir3_ra.c b/src/freedreno/ir3/ir3_ra.c
index 100ce4223543308d019368816a93ee228a7a0988..2f312a5ff1569998ed0a0152a37eb549ca723e57 100644 (file)
--- a/src/freedreno/ir3/ir3_ra.c
+++ b/src/freedreno/ir3/ir3_ra.c
@@ -388,6 +388,8 @@ writes_gpr(struct ir3_instruction *instr)
 {
        if (is_store(instr))
                return false;
+       if (instr->regs_count == 0)
+               return false;
        /* is dest a normal temp register: */
        struct ir3_register *reg = instr->regs[0];
        if (reg->flags & (IR3_REG_CONST | IR3_REG_IMMED))
@@ -586,9 +588,6 @@ ra_block_name_instructions(struct ir3_ra_ctx *ctx, struct ir3_block *block)
 
                ctx->instr_cnt++;
 
-               if (instr->regs_count == 0)
-                       continue;
-
                if (!writes_gpr(instr))
                        continue;
 
@@ -706,9 +705,6 @@ ra_block_compute_live_ranges(struct ir3_ra_ctx *ctx, struct ir3_block *block)
                struct ir3_instruction *src;
                struct ir3_register *reg;
 
-               if (instr->regs_count == 0)
-                       continue;
-
                /* There are a couple special cases to deal with here:
                 *
                 * fanout: used to split values from a higher class to a lower
@@ -1069,9 +1065,6 @@ ra_block_alloc(struct ir3_ra_ctx *ctx, struct ir3_block *block)
        list_for_each_entry (struct ir3_instruction, instr, &block->instr_list, node) {
                struct ir3_register *reg;
 
-               if (instr->regs_count == 0)
-                       continue;
-
                if (writes_gpr(instr)) {
                        reg_assign(ctx, instr->regs[0], instr);
                        if (instr->regs[0]->flags & IR3_REG_HALF)