framebuffer: register output of FIFO

diff --git a/milkymist/framebuffer/__init__.py b/milkymist/framebuffer/__init__.py
index 13b6d54c2ce34d68f26b9279335b9d5941c66c20..ad146c9c476671afe79a04168704408fa0898109 100644 (file)
--- a/milkymist/framebuffer/__init__.py
+++ b/milkymist/framebuffer/__init__.py
@@ -191,7 +191,6 @@ class FIFO(Actor):
                        clkport="clk_write")
                t = self.token("dac")
                return Fragment([
-                       Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"]),
                        asfifo.ins["read_en"].eq(1),
                        
                        self.endpoints["dac"].ack.eq(~asfifo.outs["full"]),
@@ -200,7 +199,10 @@ class FIFO(Actor):
                        
                        self.busy.eq(0),
                        asfifo.ins["rst"].eq(0)
-               ], instances=[asfifo])
+               ], [
+                       Cat(self.vga_hsync_n, self.vga_vsync_n, self.vga_r, self.vga_g, self.vga_b).eq(asfifo.outs["data_out"])
+               ],
+               instances=[asfifo])
 
 class Framebuffer:
        def __init__(self, address, asmiport):