@item b
Dump after computing branch probabilities, to @file{@var{file}.11.bp}.
@item B
-Dump after block reordering, to @file{@var{file}.25.bbro}.
+Dump after block reordering, to @file{@var{file}.26.bbro}.
@item c
Dump after instruction combination, to the file @file{@var{file}.14.combine}.
@item C
Dump after the first if conversion, to the file @file{@var{file}.15.ce}.
@item d
-Dump after delayed branch scheduling, to @file{@var{file}.28.dbr}.
+Dump after delayed branch scheduling, to @file{@var{file}.29.dbr}.
@item D
Dump all macro definitions, at the end of preprocessing, in addition to
normal output.
Dump after SSA optimizations, to @file{@var{file}.05.ssa} and
@file{@var{file}.06.ussa}.
@item E
-Dump after the second if conversion, to @file{@var{file}.21.ce2}.
+Dump after the second if conversion, to @file{@var{file}.24.ce2}.
@item f
Dump after life analysis, to @file{@var{file}.13.life}.
@item F
Dump after purging @code{ADDRESSOF} codes, to @file{@var{file}.04.addressof}.
@item g
Dump after global register allocation, to @file{@var{file}.19.greg}.
+@item o
+Dump after post-reload CSE and other optimizations, to @file{@var{file}.20.postreload}.
@item G
Dump after GCSE, to @file{@var{file}.08.gcse}.
@item i
@item j
Dump after the first jump optimization, to @file{@var{file}.02.jump}.
@item J
-Dump after the last jump optimization, to @file{@var{file}.26.jump2}.
+Dump after the last jump optimization, to @file{@var{file}.27.jump2}.
@item k
Dump after conversion from registers to stack, to @file{@var{file}.29.stack}.
@item l
Dump after loop optimization, to @file{@var{file}.09.loop}.
@item M
Dump after performing the machine dependent reorganisation pass, to
-@file{@var{file}.27.mach}.
+@file{@var{file}.28.mach}.
@item n
Dump after register renumbering, to @file{@var{file}.23.rnreg}.
@item N
Dump after RTL generation, to @file{@var{file}.00.rtl}.
@item R
Dump after the second instruction scheduling pass, to
-@file{@var{file}.24.sched2}.
+@file{@var{file}.25.sched2}.
@item s
Dump after CSE (including the jump optimization that sometimes follows
CSE), to @file{@var{file}.03.cse}.
Dump after the second CSE pass (including the jump optimization that
sometimes follows CSE), to @file{@var{file}.10.cse2}.
@item w
-Dump after the second flow pass, to @file{@var{file}.20.flow2}.
+Dump after the second flow pass, to @file{@var{file}.21.flow2}.
@item X
Dump after dead code elimination, to @file{@var{file}.06.dce}.
@item z
DFI_sched,
DFI_lreg,
DFI_greg,
+ DFI_postreload,
DFI_flow2,
DFI_peephole2,
DFI_rnreg,
{ "sched", 'S', 1, 0, 0 },
{ "lreg", 'l', 1, 0, 0 },
{ "greg", 'g', 1, 0, 0 },
+ { "postreload", 'o', 1, 0, 0 },
{ "flow2", 'w', 1, 0, 0 },
{ "peephole2", 'z', 1, 0, 0 },
{ "rnreg", 'n', 1, 0, 0 },
timevar_pop (TV_GLOBAL_ALLOC);
+ if (dump_file[DFI_greg].enabled)
+ {
+ timevar_push (TV_DUMP);
+
+ dump_global_regs (rtl_dump_file);
+
+ close_dump_file (DFI_greg, print_rtl_with_bb, insns);
+ timevar_pop (TV_DUMP);
+ }
+
if (failure)
goto exit_rest_of_compilation;
ggc_collect ();
+ open_dump_file (DFI_postreload, decl);
+
/* Do a very simple CSE pass over just the hard registers. */
if (optimize > 0)
{
timevar_pop (TV_JUMP);
}
- if (dump_file[DFI_greg].enabled)
- {
- timevar_push (TV_DUMP);
-
- dump_global_regs (rtl_dump_file);
-
- close_dump_file (DFI_greg, print_rtl_with_bb, insns);
- timevar_pop (TV_DUMP);
- }
+ close_dump_file (DFI_postreload, print_rtl_with_bb, insns);
/* Re-create the death notes which were deleted during reload. */
timevar_push (TV_FLOW2);