radeon/uvd: async flush the UVD cs

No need to block for the CS thread here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c
index 518978eadf6836efe1fa25c58795735838c955e6..fa8110541c5e4df5bbc94b135b6b495d75103346 100644 (file)
--- a/src/gallium/drivers/radeon/radeon_uvd.c
+++ b/src/gallium/drivers/radeon/radeon_uvd.c
@@ -110,7 +110,7 @@ static void flush(struct ruvd_decoder *dec)
        while(dec->cs->cdw % 16)
                pm4[dec->cs->cdw++] = RUVD_PKT2();
 
-       dec->ws->cs_flush(dec->cs, 0, 0);
+       dec->ws->cs_flush(dec->cs, RADEON_FLUSH_ASYNC, 0);
 }
 
 /* add a new set register command to the IB */