void
brw_blorp_surface_info_init(struct blorp_context *blorp,
struct brw_blorp_surface_info *info,
- const struct brw_blorp_surf *surf,
+ const struct blorp_surf *surf,
unsigned int level, unsigned int layer,
enum isl_format format, bool is_render_target)
{
void
-brw_blorp_params_init(struct brw_blorp_params *params)
+blorp_params_init(struct blorp_params *params)
{
memset(params, 0, sizeof(*params));
params->num_draw_buffers = 1;
void
blorp_gen6_hiz_op(struct blorp_batch *batch,
- struct brw_blorp_surf *surf, unsigned level, unsigned layer,
+ struct blorp_surf *surf, unsigned level, unsigned layer,
enum blorp_hiz_op op)
{
- struct brw_blorp_params params;
- brw_blorp_params_init(¶ms);
+ struct blorp_params params;
+ blorp_params_init(¶ms);
params.hiz_op = op;
#endif
struct blorp_batch;
-struct brw_blorp_params;
+struct blorp_params;
struct blorp_context {
void *driver_ctx;
const void *kernel, uint32_t kernel_size,
const void *prog_data, uint32_t prog_data_size,
uint32_t *kernel_out, void *prog_data_out);
- void (*exec)(struct blorp_batch *batch,
- const struct brw_blorp_params *params);
+ void (*exec)(struct blorp_batch *batch, const struct blorp_params *params);
};
void blorp_init(struct blorp_context *blorp, void *driver_ctx,
uint32_t offset;
};
-struct brw_blorp_surf
+struct blorp_surf
{
const struct isl_surf *surf;
struct blorp_address addr;
};
void
-brw_blorp_blit(struct blorp_batch *batch,
- const struct brw_blorp_surf *src_surf,
- unsigned src_level, unsigned src_layer,
- enum isl_format src_format, int src_swizzle,
- const struct brw_blorp_surf *dst_surf,
- unsigned dst_level, unsigned dst_layer,
- enum isl_format dst_format,
- float src_x0, float src_y0,
- float src_x1, float src_y1,
- float dst_x0, float dst_y0,
- float dst_x1, float dst_y1,
- uint32_t filter, bool mirror_x, bool mirror_y);
+blorp_blit(struct blorp_batch *batch,
+ const struct blorp_surf *src_surf,
+ unsigned src_level, unsigned src_layer,
+ enum isl_format src_format, int src_swizzle,
+ const struct blorp_surf *dst_surf,
+ unsigned dst_level, unsigned dst_layer,
+ enum isl_format dst_format,
+ float src_x0, float src_y0,
+ float src_x1, float src_y1,
+ float dst_x0, float dst_y0,
+ float dst_x1, float dst_y1,
+ uint32_t filter, bool mirror_x, bool mirror_y);
void
blorp_fast_clear(struct blorp_batch *batch,
- const struct brw_blorp_surf *surf,
+ const struct blorp_surf *surf,
uint32_t level, uint32_t layer,
uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1);
void
blorp_clear(struct blorp_batch *batch,
- const struct brw_blorp_surf *surf,
+ const struct blorp_surf *surf,
uint32_t level, uint32_t layer,
uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
enum isl_format format, union isl_color_value clear_color,
bool color_write_disable[4]);
void
-brw_blorp_ccs_resolve(struct blorp_batch *batch,
- struct brw_blorp_surf *surf, enum isl_format format);
+blorp_ccs_resolve(struct blorp_batch *batch,
+ struct blorp_surf *surf, enum isl_format format);
/**
* For an overview of the HiZ operations, see the following sections of the
void
blorp_gen6_hiz_op(struct blorp_batch *batch,
- struct brw_blorp_surf *surf, unsigned level, unsigned layer,
+ struct blorp_surf *surf, unsigned level, unsigned layer,
enum blorp_hiz_op op);
#ifdef __cplusplus
static void
brw_blorp_get_blit_kernel(struct blorp_context *blorp,
- struct brw_blorp_params *params,
+ struct blorp_params *params,
const struct brw_blorp_blit_prog_key *prog_key)
{
if (blorp->lookup_shader(blorp, prog_key, sizeof(*prog_key),
}
void
-brw_blorp_blit(struct blorp_batch *batch,
- const struct brw_blorp_surf *src_surf,
- unsigned src_level, unsigned src_layer,
- enum isl_format src_format, int src_swizzle,
- const struct brw_blorp_surf *dst_surf,
- unsigned dst_level, unsigned dst_layer,
- enum isl_format dst_format,
- float src_x0, float src_y0,
- float src_x1, float src_y1,
- float dst_x0, float dst_y0,
- float dst_x1, float dst_y1,
- GLenum filter, bool mirror_x, bool mirror_y)
+blorp_blit(struct blorp_batch *batch,
+ const struct blorp_surf *src_surf,
+ unsigned src_level, unsigned src_layer,
+ enum isl_format src_format, int src_swizzle,
+ const struct blorp_surf *dst_surf,
+ unsigned dst_level, unsigned dst_layer,
+ enum isl_format dst_format,
+ float src_x0, float src_y0,
+ float src_x1, float src_y1,
+ float dst_x0, float dst_y0,
+ float dst_x1, float dst_y1,
+ GLenum filter, bool mirror_x, bool mirror_y)
{
const struct brw_device_info *devinfo = batch->blorp->isl_dev->info;
- struct brw_blorp_params params;
- brw_blorp_params_init(¶ms);
+ struct blorp_params params;
+ blorp_params_init(¶ms);
brw_blorp_surface_info_init(batch->blorp, ¶ms.src, src_surf, src_level,
src_layer, src_format, false);
};
static void
-brw_blorp_params_get_clear_kernel(struct blorp_context *blorp,
- struct brw_blorp_params *params,
- bool use_replicated_data)
+blorp_params_get_clear_kernel(struct blorp_context *blorp,
+ struct blorp_params *params,
+ bool use_replicated_data)
{
struct brw_blorp_const_color_prog_key blorp_key;
memset(&blorp_key, 0, sizeof(blorp_key));
void
blorp_fast_clear(struct blorp_batch *batch,
- const struct brw_blorp_surf *surf,
+ const struct blorp_surf *surf,
uint32_t level, uint32_t layer,
uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1)
{
- struct brw_blorp_params params;
- brw_blorp_params_init(¶ms);
+ struct blorp_params params;
+ blorp_params_init(¶ms);
params.x0 = x0;
params.y0 = y0;
get_fast_clear_rect(batch->blorp->isl_dev, surf->aux_surf,
¶ms.x0, ¶ms.y0, ¶ms.x1, ¶ms.y1);
- brw_blorp_params_get_clear_kernel(batch->blorp, ¶ms, true);
+ blorp_params_get_clear_kernel(batch->blorp, ¶ms, true);
brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, level, layer,
surf->surf->format, true);
void
blorp_clear(struct blorp_batch *batch,
- const struct brw_blorp_surf *surf,
+ const struct blorp_surf *surf,
uint32_t level, uint32_t layer,
uint32_t x0, uint32_t y0, uint32_t x1, uint32_t y1,
enum isl_format format, union isl_color_value clear_color,
bool color_write_disable[4])
{
- struct brw_blorp_params params;
- brw_blorp_params_init(¶ms);
+ struct blorp_params params;
+ blorp_params_init(¶ms);
params.x0 = x0;
params.y0 = y0;
use_simd16_replicated_data = false;
}
- brw_blorp_params_get_clear_kernel(batch->blorp, ¶ms,
- use_simd16_replicated_data);
+ blorp_params_get_clear_kernel(batch->blorp, ¶ms,
+ use_simd16_replicated_data);
brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf, level, layer,
format, true);
}
void
-brw_blorp_ccs_resolve(struct blorp_batch *batch,
- struct brw_blorp_surf *surf, enum isl_format format)
+blorp_ccs_resolve(struct blorp_batch *batch,
+ struct blorp_surf *surf, enum isl_format format)
{
- struct brw_blorp_params params;
- brw_blorp_params_init(¶ms);
+ struct blorp_params params;
+ blorp_params_init(¶ms);
brw_blorp_surface_info_init(batch->blorp, ¶ms.dst, surf,
0 /* level */, 0 /* layer */, format, true);
* color" message.
*/
- brw_blorp_params_get_clear_kernel(batch->blorp, ¶ms, true);
+ blorp_params_get_clear_kernel(batch->blorp, ¶ms, true);
batch->blorp->exec(batch, ¶ms);
}
void
brw_blorp_surface_info_init(struct blorp_context *blorp,
struct brw_blorp_surface_info *info,
- const struct brw_blorp_surf *surf,
+ const struct blorp_surf *surf,
unsigned int level, unsigned int layer,
enum isl_format format, bool is_render_target);
return MAX2((prog_data->num_varying_inputs + 1) / 2, 1);
}
-struct brw_blorp_params
+struct blorp_params
{
uint32_t x0;
uint32_t y0;
struct brw_blorp_prog_data *wm_prog_data;
};
-void
-brw_blorp_params_init(struct brw_blorp_params *params);
+void blorp_params_init(struct blorp_params *params);
struct brw_blorp_blit_prog_key
{
}
static void
-brw_blorp_surf_for_miptree(struct brw_context *brw,
- struct brw_blorp_surf *surf,
- struct intel_mipmap_tree *mt,
- bool is_render_target,
- unsigned *level,
- struct isl_surf tmp_surfs[2])
+blorp_surf_for_miptree(struct brw_context *brw,
+ struct blorp_surf *surf,
+ struct intel_mipmap_tree *mt,
+ bool is_render_target,
+ unsigned *level,
+ struct isl_surf tmp_surfs[2])
{
intel_miptree_get_isl_surf(brw, mt, &tmp_surfs[0]);
surf->surf = &tmp_surfs[0];
intel_miptree_used_for_rendering(dst_mt);
struct isl_surf tmp_surfs[4];
- struct brw_blorp_surf src_surf, dst_surf;
- brw_blorp_surf_for_miptree(brw, &src_surf, src_mt, false,
- &src_level, &tmp_surfs[0]);
- brw_blorp_surf_for_miptree(brw, &dst_surf, dst_mt, true,
- &dst_level, &tmp_surfs[2]);
+ struct blorp_surf src_surf, dst_surf;
+ blorp_surf_for_miptree(brw, &src_surf, src_mt, false,
+ &src_level, &tmp_surfs[0]);
+ blorp_surf_for_miptree(brw, &dst_surf, dst_mt, true,
+ &dst_level, &tmp_surfs[2]);
struct blorp_batch batch;
blorp_batch_init(&brw->blorp, &batch, brw);
- brw_blorp_blit(&batch, &src_surf, src_level, src_layer,
- brw_blorp_to_isl_format(brw, src_format, false), src_swizzle,
- &dst_surf, dst_level, dst_layer,
- brw_blorp_to_isl_format(brw, dst_format, true),
- src_x0, src_y0, src_x1, src_y1,
- dst_x0, dst_y0, dst_x1, dst_y1,
- filter, mirror_x, mirror_y);
+ blorp_blit(&batch, &src_surf, src_level, src_layer,
+ brw_blorp_to_isl_format(brw, src_format, false), src_swizzle,
+ &dst_surf, dst_level, dst_layer,
+ brw_blorp_to_isl_format(brw, dst_format, true),
+ src_x0, src_y0, src_x1, src_y1,
+ dst_x0, dst_y0, dst_x1, dst_y1,
+ filter, mirror_x, mirror_y);
blorp_batch_finish(&batch);
intel_miptree_slice_set_needs_hiz_resolve(dst_mt, dst_level, dst_layer);
/* We can't setup the blorp_surf until we've allocated the MCS above */
struct isl_surf isl_tmp[2];
- struct brw_blorp_surf surf;
+ struct blorp_surf surf;
unsigned level = irb->mt_level;
- brw_blorp_surf_for_miptree(brw, &surf, irb->mt, true, &level, isl_tmp);
+ blorp_surf_for_miptree(brw, &surf, irb->mt, true, &level, isl_tmp);
if (can_fast_clear) {
DBG("%s (fast) to mt %p level %d layer %d\n", __FUNCTION__,
intel_miptree_used_for_rendering(mt);
struct isl_surf isl_tmp[2];
- struct brw_blorp_surf surf;
+ struct blorp_surf surf;
unsigned level = 0;
- brw_blorp_surf_for_miptree(brw, &surf, mt, true, &level, isl_tmp);
+ blorp_surf_for_miptree(brw, &surf, mt, true, &level, isl_tmp);
struct blorp_batch batch;
blorp_batch_init(&brw->blorp, &batch, brw);
- brw_blorp_ccs_resolve(&batch, &surf,
- brw_blorp_to_isl_format(brw, format, true));
+ blorp_ccs_resolve(&batch, &surf,
+ brw_blorp_to_isl_format(brw, format, true));
blorp_batch_finish(&batch);
mt->fast_clear_state = INTEL_FAST_CLEAR_STATE_RESOLVED;
assert(intel_miptree_level_has_hiz(mt, level));
struct isl_surf isl_tmp[2];
- struct brw_blorp_surf surf;
- brw_blorp_surf_for_miptree(brw, &surf, mt, true, &level, isl_tmp);
+ struct blorp_surf surf;
+ blorp_surf_for_miptree(brw, &surf, mt, true, &level, isl_tmp);
struct blorp_batch batch;
blorp_batch_init(&brw->blorp, &batch, brw);
unsigned int level, unsigned int layer, enum blorp_hiz_op op);
void gen6_blorp_exec(struct blorp_batch *batch,
- const struct brw_blorp_params *params);
+ const struct blorp_params *params);
void gen7_blorp_exec(struct blorp_batch *batch,
- const struct brw_blorp_params *params);
+ const struct blorp_params *params);
void gen75_blorp_exec(struct blorp_batch *batch,
- const struct brw_blorp_params *params);
+ const struct blorp_params *params);
void gen8_blorp_exec(struct blorp_batch *batch,
- const struct brw_blorp_params *params);
+ const struct blorp_params *params);
void gen9_blorp_exec(struct blorp_batch *batch,
- const struct brw_blorp_params *params);
+ const struct blorp_params *params);
#ifdef __cplusplus
} /* extern "C" */
void
genX(blorp_exec)(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
assert(batch->blorp->driver_ctx == batch->driver_batch);
struct brw_context *brw = batch->driver_batch;
*
* static void
* blorp_exec(struct blorp_context *blorp, void *batch_data,
- * const struct brw_blorp_params *params);
+ * const struct blorp_params *params);
*
* It is the job of whoever includes this header to wrap this in something
* to get an externally visible symbol.
* The URB size is in turn expressed in 64 bytes (512 bits).
*/
static inline unsigned
-gen7_blorp_get_vs_entry_size(const struct brw_blorp_params *params)
+gen7_blorp_get_vs_entry_size(const struct blorp_params *params)
{
const unsigned num_varyings =
params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
*/
static void
emit_urb_config(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
blorp_emit_urb_config(batch, gen7_blorp_get_vs_entry_size(params));
}
static void
blorp_emit_vertex_data(struct blorp_batch *batch,
- const struct brw_blorp_params *params,
+ const struct blorp_params *params,
struct blorp_address *addr,
uint32_t *size)
{
static void
blorp_emit_input_varying_data(struct blorp_batch *batch,
- const struct brw_blorp_params *params,
+ const struct blorp_params *params,
struct blorp_address *addr,
uint32_t *size)
{
static void
blorp_emit_vertex_buffers(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
struct GENX(VERTEX_BUFFER_STATE) vb[2];
memset(vb, 0, sizeof(vb));
static void
blorp_emit_vertex_elements(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
const unsigned num_varyings =
params->wm_prog_data ? params->wm_prog_data->num_varying_inputs : 0;
static void
blorp_emit_sf_config(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
static void
blorp_emit_ps_config(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
const struct brw_blorp_prog_data *prog_data = params->wm_prog_data;
static void
blorp_emit_depth_stencil_config(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
#if GEN_GEN >= 7
const uint32_t mocs = 1; /* GEN7_MOCS_L3 */
static uint32_t
blorp_emit_blend_state(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
struct GENX(BLEND_STATE) blend;
memset(&blend, 0, sizeof(blend));
static uint32_t
blorp_emit_color_calc_state(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
uint32_t offset;
void *state = blorp_alloc_dynamic_state(batch, AUB_TRACE_CC_STATE,
static uint32_t
blorp_emit_depth_stencil_state(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
#if GEN_GEN >= 8
static void
blorp_emit_surface_states(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
uint32_t bind_offset, *bind_map;
void *surface_maps[2];
static void
blorp_emit_sampler_state(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
struct GENX(SAMPLER_STATE) sampler = {
.MipModeFilter = MIPFILTER_NONE,
/* 3DSTATE_VIEWPORT_STATE_POINTERS */
static void
blorp_emit_viewport_state(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+ const struct blorp_params *params)
{
uint32_t cc_vp_offset;
* This function alters no GL state.
*/
static void
-blorp_exec(struct blorp_batch *batch,
- const struct brw_blorp_params *params)
+blorp_exec(struct blorp_batch *batch, const struct blorp_params *params)
{
uint32_t blend_state_offset = 0;
uint32_t color_calc_state_offset = 0;