re PR target/81988 (invalid std instruction with odd register)

	PR target/81988
	* config/sparc/sparc.md (mulsi3): Rename into *mulsi3_sp32.
	(*mulsi3_sp64): New instruction.
	(mulsi3): New expander.

From-SVN: r251904

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index d3a149ce1f2d9cba2a1771832a962a54ee25ad71..9f11d0e314c0578659c43bb2410db2b5eeeda499 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2017-09-07  Eric Botcazou  <ebotcazou@adacore.com>
+
+       PR target/81988
+       * config/sparc/sparc.md (mulsi3): Rename into *mulsi3_sp32.
+       (*mulsi3_sp64): New instruction.
+       (mulsi3): New expander.
+
 2017-09-08  Uros Bizjak  <ubizjak@gmail.com>
 
        * config/alpha/alpha.c (alpha_print_operand) <case 'S'>: Remove.

diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 925b49e03949692d81c0bc6546ba93d29ee2cd6c..d9cbd4fb10d69955f4584391ffcfc62c23c8f008 100644 (file)
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -4517,7 +4517,14 @@ visl")
 ;; The 32-bit multiply/divide instructions are deprecated on v9, but at
 ;; least in UltraSPARC I, II and IIi it is a win tick-wise.
 
-(define_insn "mulsi3"
+(define_expand "mulsi3"
+  [(set (match_operand:SI 0 "register_operand" "")
+       (mult:SI (match_operand:SI 1 "arith_operand" "")
+                (match_operand:SI 2 "arith_operand" "")))]
+  "TARGET_HARD_MUL || TARGET_ARCH64"
+  "")
+
+(define_insn "*mulsi3_sp32"
   [(set (match_operand:SI 0 "register_operand" "=r")
        (mult:SI (match_operand:SI 1 "arith_operand" "%r")
                 (match_operand:SI 2 "arith_operand" "rI")))]
@@ -4525,6 +4532,14 @@ visl")
   "smul\t%1, %2, %0"
   [(set_attr "type" "imul")])
 
+(define_insn "*mulsi3_sp64"
+  [(set (match_operand:SI 0 "register_operand" "=r")
+       (mult:SI (match_operand:SI 1 "arith_operand" "%r")
+                (match_operand:SI 2 "arith_operand" "rI")))]
+  "TARGET_ARCH64"
+  "mulx\t%1, %2, %0"
+  [(set_attr "type" "imul")])
+
 (define_expand "muldi3"
   [(set (match_operand:DI 0 "register_operand" "")
        (mult:DI (match_operand:DI 1 "arith_operand" "")

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2ef3b1672164263aa6d1e60d128052e9dae36d0c..4a1ebd6036fcf6275ebb6367ec6a843d7c1456be 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,9 @@
 2017-09-07  Eric Botcazou  <ebotcazou@adacore.com>
-       
+
+       * gcc.dg/pr81988.c: New test.
+
+2017-09-07  Eric Botcazou  <ebotcazou@adacore.com>
+
        * gnat.dg/opt67.adb: New test.
        * gnat.dg/opt67_pkg.ad[sb]: New helper.
 

diff --git a/gcc/testsuite/gcc.dg/pr81988.c b/gcc/testsuite/gcc.dg/pr81988.c
new file mode 100644 (file)
index 0000000..dbbf436
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr81988.c
@@ -0,0 +1,22 @@
+/* PR target/81988 */
+/* Testcase by James Cowgill <jcowgill+gcc@jcowgill.uk> */
+
+/* { dg-do assemble } */
+/* { dg-require-effective-target pie } */
+/* { dg-options "-O3 -fpie" } */
+
+int c, d;
+
+short **e;
+int *a;
+
+void foo(void)
+{
+  int g[64 * 35], *h = g;
+  do {
+    short *f = e[d];
+    for (int i = 0; i < 4; i++)
+      a[i] = a[i] + (h[364] + f[4] * h[64] + f[5] * h[i] + f[6] * h[i + 3 * 4] +
+                     f[7] * h[i + 4]);
+  } while (c);
+}