re PR bootstrap/88714 (bootstrap comparison failure on armv7l since r265398)

	PR bootstrap/88714
	* constraints.md (q): Remove.
	* config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint
	instead of q.

From-SVN: r269067

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 54a1d928b7149c0d970ef8cbcb2cafa4a5f60fdf..46c918b166667ebda84c853d67e0dce7c9e584c3 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2019-02-21  Jakub Jelinek  <jakub@redhat.com>
+
+       PR bootstrap/88714
+       * constraints.md (q): Remove.
+       * config/arm/ldrdstrd.md (*arm_ldrd, *arm_strd): Use rk constraint
+       instead of q.
+
 2019-02-21  Martin Jambor  <mjambor@suse.cz>
 
        PR hsa/89302

diff --git a/gcc/config/arm/constraints.md b/gcc/config/arm/constraints.md
index ccde5941b2413c2da91bfb4e7f514b5b4c013361..57ec06396220b9f7f356943dae1443c4c763741f 100644 (file)
--- a/gcc/config/arm/constraints.md
+++ b/gcc/config/arm/constraints.md
@@ -90,9 +90,6 @@
 (define_register_constraint "k" "STACK_REG"
  "@internal The stack register.")
 
-(define_register_constraint "q" "(TARGET_ARM && TARGET_LDRD) ? CORE_REGS : GENERAL_REGS"
-  "@internal In ARM state with LDRD support, core registers, otherwise general registers.")
-
 (define_register_constraint "b" "TARGET_THUMB ? BASE_REGS : NO_REGS"
  "@internal
   Thumb only.  The union of the low registers and the stack register.")

diff --git a/gcc/config/arm/ldrdstrd.md b/gcc/config/arm/ldrdstrd.md
index bb492bb2915096bca0e0bac38fd6e2d0c5a450c3..a151c3140da719e4163ebab5b96e2aa05d2c0d58 100644 (file)
--- a/gcc/config/arm/ldrdstrd.md
+++ b/gcc/config/arm/ldrdstrd.md
@@ -159,7 +159,7 @@
 (define_insn "*arm_ldrd"
   [(parallel [(set (match_operand:SI 0 "s_register_operand" "=r")
                   (match_operand:SI 2 "memory_operand" "m"))
-             (set (match_operand:SI 1 "s_register_operand" "=q")
+             (set (match_operand:SI 1 "s_register_operand" "=rk")
                   (match_operand:SI 3 "memory_operand" "m"))])]
   "TARGET_LDRD && TARGET_ARM && reload_completed
   && valid_operands_ldrd_strd (operands, true)"
@@ -180,7 +180,7 @@
   [(parallel [(set (match_operand:SI 2 "memory_operand" "=m")
                   (match_operand:SI 0 "s_register_operand" "r"))
              (set (match_operand:SI 3 "memory_operand" "=m")
-                  (match_operand:SI 1 "s_register_operand" "q"))])]
+                  (match_operand:SI 1 "s_register_operand" "rk"))])]
   "TARGET_LDRD && TARGET_ARM && reload_completed
   && valid_operands_ldrd_strd (operands, false)"
   {