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diff --git a/openpower/sv/comparison_table.mdwn b/openpower/sv/comparison_table.mdwn
index c1bb977e99bbbcc7f8deedcf68dfc95348178183..285b1d403da5193a590ff2a568302ad9e2d4faed 100644 (file)
--- a/openpower/sv/comparison_table.mdwn
+++ b/openpower/sv/comparison_table.mdwn
@@ -12,6 +12,8 @@
 |66000[^36]     |~200          |unknown          |AutoVec[^36]        |see [^36]          |see[^36]            |no           |see [^36]       |no               |yes[^37]|see [^36]       |no                     |no              |no           | no           |
 
 [^1]: plus EXT001 24-bit prefixing using 25% of EXT001 space. See [[sv/svp64]]
+[^2]: If treated as a 1-Dimensional ISA, and designed badly, the 24-bit Prefix expands 200+ scalar instructions to well over a million intrinsics (N~=10^4 **times** M~=10^2).
+    If treated as a 2-Dimensional ISA and designed well, there are far less. N prefix intrinsics **plus** M scalar instruction intrinsics, where N is likely to be of the order of 10^2 and M of the order of 10^2.
 [^3]: A 2-Dimensional Scalable Vector ISA **specifically designed for the Power ISA** with both Horizontal-First and Vertical-First Modes. See [[sv/vector_isa_comparison]]
 [^4]: on specific operations.  See [[opcode_regs_deduped]] for full list. Key: 2P - Twin Predication, 1P - Single-Predicate
 [^5]: SVP64 provides a Vector concept on top of the **Scalar** GPR, FPR and CR Fields, extended to 128 entries.
@@ -41,8 +43,6 @@
 [^24]: [NEC SX Aurora](https://ftp.libre-soc.org/NEC_SX_Aurora_TSUBASA_VectorEngine-as-manual-v1.2.pdf) is based on the original Cray Vectors
 [^25]: [Aurora ISA guide](https://sxauroratsubasa.sakura.ne.jp/documents/guide/pdfs/Aurora_ISA_guide.pdf) Appendix-3 11.1 p508
 [^26]: Like the original Cray Vectors, the ISA Vector Length is independent of the underlying hardware, however Generation 1 has 256 elements per Vector register (3.2.4 p24, Aurora ISA guide)
-[^2]: If treated as a 1-Dimensional ISA, and designed badly, the 24-bit Prefix expands 200+ scalar instructions to well over a million intrinsics (N~=10^4 **times** M~=10^2).
-    If treated as a 2-Dimensional ISA and designed well, there are far less. N prefix intrinsics **plus** M scalar instruction intrinsics, where N is likely to be of the order of 10^2 and M of the order of 10^2.
 [^27]: [Altivec gcc intrinsics](https://gcc.gnu.org/onlinedocs/gcc/PowerPC-AltiVec_002fVSX-Built-in-Functions.html), contains links to additional VSX intrinsics for ISA 2.05/6/7, 3.0 and 3.1
 [^28]: NEON 32-bit 2754 intrinsics, NEON 64-bit 4334 intrinsics.
 [^29]: SVE: 4140 intrinsics, SVE2 1900 intrinsics