[libre-riscv-dev] [Bug 208] implement CORDIC in a general way sufficient to do transc...

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+Date: Thu, 16 Apr 2020 08:53:18 +0000
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+X-Bugzilla-Product: Libre-SOC's first SoC
+X-Bugzilla-Component: ALU (including IEEE754 16/32/64-bit FPU)
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+X-Bugzilla-Severity: enhancement
+X-Bugzilla-Who: programmerjake@gmail.com
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+Subject: [libre-riscv-dev] [Bug 208] implement CORDIC in a general way
+ sufficient to do transcendentals
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