i965/fs: Fix horiz_offset() to handle ARF and HW GRF register files.

We'll hit these in some cases during SIMD lowering in 32-wide
programs.

Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>

diff --git a/src/mesa/drivers/dri/i965/brw_ir_fs.h b/src/mesa/drivers/dri/i965/brw_ir_fs.h
index cae41a02b8c36f67886724cb8aa89ef3bdd1e17f..bb05a058a8cad86af7e34d31bf82f15fd22f3e9f 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_ir_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_ir_fs.h
@@ -113,7 +113,7 @@ byte_offset(fs_reg reg, unsigned delta)
 }
 
 static inline fs_reg
-horiz_offset(fs_reg reg, unsigned delta)
+horiz_offset(const fs_reg &reg, unsigned delta)
 {
    switch (reg.file) {
    case BAD_FILE:
@@ -121,17 +121,23 @@ horiz_offset(fs_reg reg, unsigned delta)
    case IMM:
       /* These only have a single component that is implicitly splatted.  A
        * horizontal offset should be a harmless no-op.
+       * XXX - Handle vector immediates correctly.
        */
-      break;
+      return reg;
    case VGRF:
    case MRF:
    case ATTR:
       return byte_offset(reg, delta * reg.stride * type_sz(reg.type));
    case ARF:
    case FIXED_GRF:
-      assert(delta == 0);
+      if (reg.is_null()) {
+         return reg;
+      } else {
+         const unsigned stride = reg.hstride ? 1 << (reg.hstride - 1) : 0;
+         return byte_offset(reg, delta * stride * type_sz(reg.type));
+      }
    }
-   return reg;
+   unreachable("Invalid register file");
 }
 
 /**