}
if (info->chip_class >= GFX10) {
info->tcc_cache_line_size = 128;
+ /* This is a hack, but it's all we can do without a kernel upgrade. */
+ info->tcc_harvested =
+ (info->vram_size / info->num_tcc_blocks) != 512*1024*1024;
} else {
info->tcc_cache_line_size = 64;
}
printf(" num_sdma_rings = %i\n", info->num_sdma_rings);
printf(" clock_crystal_freq = %i\n", info->clock_crystal_freq);
printf(" tcc_cache_line_size = %u\n", info->tcc_cache_line_size);
+ printf(" tcc_harvested = %u\n", info->tcc_harvested);
printf(" use_display_dcc_unaligned = %u\n", info->use_display_dcc_unaligned);
printf(" use_display_dcc_with_retile_blit = %u\n", info->use_display_dcc_with_retile_blit);
uint32_t num_sdma_rings;
uint32_t clock_crystal_freq;
uint32_t tcc_cache_line_size;
+ bool tcc_harvested;
bool has_clear_state;
bool has_distributed_tess;
bool has_dcc_constant_encode;