[DWARF] Sync GCC dwarf.def change on AArch64
authorJiong Wang <jiong.wang@arm.com>
Wed, 4 Jan 2017 14:27:52 +0000 (14:27 +0000)
committerJiong Wang <jiong.wang@arm.com>
Wed, 4 Jan 2017 14:27:52 +0000 (14:27 +0000)
include/
* dwarf2.def: Sync with mainline gcc sources.

include/ChangeLog
include/dwarf2.def

index a51834233d0457af35b14528f7890b2c17d4834e..f0569bec3fde9b7baa38e0bf089340afca2e2690 100644 (file)
@@ -1,3 +1,13 @@
+2017-01-04  Jiong Wang  <jiong.wang@arm.com>
+
+       * dwarf2.def: Sync with mainline gcc sources.
+
+       2017-01-04  Richard Earnshaw  <rearnsha@arm.com>
+                   Jiong Wang  <jiong.wang@arm.com>
+
+       * dwarf2.def (DW_OP_AARCH64_operation): Reserve the number 0xea.
+       (DW_CFA_GNU_window_save): Comments the multiplexing on AArch64.
+
 2017-01-04  Szabolcs Nagy  <szabolcs.nagy@arm.com>
 
        * opcode/aarch64.h (AARCH64_FEATURE_RCPC): Define.
index 4596c9a336b90968f19e2da071bc4ff7b46b8c66..ddadaccb25c2324c23b6fdc24b56b6e9127b5c9c 100644 (file)
@@ -685,6 +685,12 @@ DW_OP (DW_OP_HP_unmod_range, 0xe5)
 DW_OP (DW_OP_HP_tls, 0xe6)
 /* PGI (STMicroelectronics) extensions.  */
 DW_OP (DW_OP_PGI_omp_thread_num, 0xf8)
+/* AARCH64 extensions.
+   DW_OP_AARCH64_operation takes one mandatory unsigned LEB128 operand.
+   Bits[6:0] of this operand is the action code, all others bits are initialized
+   to 0 except explicitly documented for one action.  Please refer AArch64 DWARF
+   ABI documentation for details.  */
+DW_OP (DW_OP_AARCH64_operation, 0xea)
 DW_END_OP
 
 DW_FIRST_ATE (DW_ATE_void, 0x0)
@@ -766,7 +772,8 @@ DW_CFA (DW_CFA_hi_user, 0x3f)
 
 /* SGI/MIPS specific.  */
 DW_CFA (DW_CFA_MIPS_advance_loc8, 0x1d)
-/* GNU extensions.  */
+/* GNU extensions.
+   NOTE: DW_CFA_GNU_window_save is multiplexed on Sparc and AArch64.  */
 DW_CFA (DW_CFA_GNU_window_save, 0x2d)
 DW_CFA (DW_CFA_GNU_args_size, 0x2e)
 DW_CFA (DW_CFA_GNU_negative_offset_extended, 0x2f)