includes: sort includes again
authorNathan Binkert <nate@binkert.org>
Sun, 17 May 2009 21:34:52 +0000 (14:34 -0700)
committerNathan Binkert <nate@binkert.org>
Sun, 17 May 2009 21:34:52 +0000 (14:34 -0700)
99 files changed:
src/arch/alpha/isa_traits.hh
src/arch/alpha/predecoder.hh
src/arch/arm/utility.hh
src/arch/mips/dsp.hh
src/arch/mips/isa_traits.hh
src/arch/mips/utility.hh
src/arch/sparc/isa_traits.hh
src/arch/sparc/predecoder.hh
src/arch/sparc/regfile.hh
src/arch/x86/bios/acpi.hh
src/arch/x86/bios/e820.hh
src/arch/x86/bios/intelmp.cc
src/arch/x86/bios/smbios.cc
src/arch/x86/bios/smbios.hh
src/arch/x86/intmessage.hh
src/arch/x86/miscregfile.hh
src/arch/x86/pagetable.hh
src/arch/x86/pagetable_walker.hh
src/arch/x86/predecoder.cc
src/arch/x86/regfile.hh
src/arch/x86/utility.hh
src/arch/x86/x86_traits.hh
src/base/cp_annotate.hh
src/base/crc.cc
src/base/inet.cc
src/base/inet.hh
src/base/intmath.hh
src/base/misc.cc
src/base/pollevent.cc
src/base/res_list.hh
src/base/statistics.hh
src/base/stats/mysql.cc
src/base/stats/output.cc
src/cpu/exetrace.hh
src/cpu/inorder/comm.hh
src/cpu/inorder/inorder_trace.hh
src/cpu/inteltrace.hh
src/cpu/legiontrace.hh
src/cpu/nativetrace.hh
src/cpu/o3/2bit_local_pred.hh
src/cpu/o3/bpred_unit.hh
src/cpu/o3/comm.hh
src/cpu/o3/fetch_impl.hh
src/cpu/o3/inst_queue.hh
src/cpu/o3/ras.hh
src/cpu/o3/store_set.hh
src/cpu/o3/tournament_pred.hh
src/cpu/ozone/ea_list.hh
src/cpu/ozone/inst_queue.hh
src/cpu/ozone/null_predictor.hh
src/cpu/simple/base.cc
src/cpu/simple_thread.hh
src/cpu/static_inst.hh
src/cpu/thread_context.hh
src/dev/alpha/backdoor.hh
src/dev/etherlink.hh
src/dev/etherpkt.hh
src/dev/intel_8254_timer.hh
src/dev/mips/backdoor.hh
src/dev/ns_gige.cc
src/dev/sinic.cc
src/dev/x86/intdev.hh
src/dev/x86/south_bridge.cc
src/kern/tru64/dump_mbuf.cc
src/kern/tru64/mbuf.hh
src/mem/bus.hh
src/mem/cache/cache_impl.hh
src/mem/cache/mshr.cc
src/mem/cache/tags/fa_lru.cc
src/mem/cache/tags/fa_lru.hh
src/mem/cache/tags/iic_repl/gen.cc
src/mem/cache/tags/iic_repl/repl.hh
src/mem/cache/tags/lru.hh
src/mem/gems_common/util.cc
src/mem/packet.hh
src/mem/page_table.hh
src/mem/physical.cc
src/mem/ruby/common/Debug.hh
src/mem/ruby/common/Global.hh
src/mem/ruby/network/orion/power_ll.cc
src/mem/ruby/network/orion/power_utils.cc
src/mem/rubymem.cc
src/mem/slicc/slicc_global.hh
src/python/swig/core.i
src/python/swig/event.i
src/python/swig/pyobject.hh
src/python/swig/sim_object.i
src/sim/arguments.hh
src/sim/eventq.hh
src/sim/init.cc
src/sim/insttracer.hh
src/sim/sim_object.cc
src/sim/simulate.cc
src/sim/syscall_emul.hh
src/unittest/rangemaptest.cc
src/unittest/rangemultimaptest.cc
util/statetrace/arch/tracechild_amd64.hh
util/statetrace/arch/tracechild_i386.hh
util/statetrace/arch/tracechild_sparc.hh

index aae8271ce8de50eaf2b8f6e374d6e6e455baac1e..f7114e5cc29ee17f4b85470091dd1e6046762791 100644 (file)
@@ -37,8 +37,8 @@ namespace LittleEndianGuest {}
 #include "arch/alpha/ipr.hh"
 #include "arch/alpha/max_inst_regs.hh"
 #include "arch/alpha/types.hh"
-#include "config/full_system.hh"
 #include "base/types.hh"
+#include "config/full_system.hh"
 
 class StaticInstPtr;
 
index d18bb24029159d4be9f291e39be080e27e6cc939..913bd876460f6e3fb275b72af4b4ea57ecb5f63d 100644 (file)
@@ -33,8 +33,8 @@
 
 #include "arch/alpha/types.hh"
 #include "base/misc.hh"
-#include "config/full_system.hh"
 #include "base/types.hh"
+#include "config/full_system.hh"
 
 class ThreadContext;
 
index e26a00706237a9d64aca7d1b7b220475042af77d..e0ae7cd2e46b93468a4fa08b752562e30e9954ee 100644 (file)
@@ -35,9 +35,9 @@
 
 #include "arch/arm/types.hh"
 #include "base/misc.hh"
+#include "base/types.hh"
 #include "config/full_system.hh"
 #include "cpu/thread_context.hh"
-#include "base/types.hh"
 
 class ThreadContext;
 
index dbada893aa40969b755141a94b27a1b09a4ddf27..a3d6c1a8fb143960185445905184c1cf194014fb 100755 (executable)
@@ -34,8 +34,8 @@
 #include "arch/mips/types.hh"
 #include "arch/mips/isa_traits.hh"
 #include "base/misc.hh"
-#include "config/full_system.hh"
 #include "base/types.hh"
+#include "config/full_system.hh"
 
 class ThreadContext;
 
index b091adb5d2c81800138cf0f056a394318ea2ec58..7522dcf0f11ee642c02980abaec7eb44cac3dde2 100644 (file)
@@ -36,8 +36,8 @@
 
 #include "arch/mips/types.hh"
 #include "arch/mips/mips_core_specific.hh"
-#include "config/full_system.hh"
 #include "base/types.hh"
+#include "config/full_system.hh"
 
 namespace LittleEndianGuest {};
 
index 95b7c875e3a8669dc572d22dc51980427bac5ff1..1c77b6ff2ef99c57c964e04a07c5822c462690f4 100644 (file)
 #include "arch/mips/types.hh"
 #include "arch/mips/isa_traits.hh"
 #include "base/misc.hh"
-#include "config/full_system.hh"
-//XXX This is needed for size_t. We should use something other than size_t
-//#include "kern/linux/linux.hh"
 #include "base/types.hh"
-
+#include "config/full_system.hh"
 #include "cpu/thread_context.hh"
 
 class ThreadContext;
index 1c783a9b9a173f37f5dbd7b1b11ade0f6828a168..00dadcf3deed607762f801e0eb5e55a1802d7dc4 100644 (file)
@@ -35,8 +35,8 @@
 #include "arch/sparc/types.hh"
 #include "arch/sparc/max_inst_regs.hh"
 #include "arch/sparc/sparc_traits.hh"
-#include "config/full_system.hh"
 #include "base/types.hh"
+#include "config/full_system.hh"
 
 class StaticInstPtr;
 
index c7503b282ec3208b42c7c50ef89cd4dde45d08dd..7775e858e369209643ed2a692b08a835b38777a2 100644 (file)
@@ -33,8 +33,8 @@
 
 #include "arch/sparc/types.hh"
 #include "base/misc.hh"
-#include "cpu/thread_context.hh"
 #include "base/types.hh"
+#include "cpu/thread_context.hh"
 
 class ThreadContext;
 
index f732c962562e9130cf8bdafbe96715eae4e984df..7da302eb79eef1a9a4589a9d3818386656a84829 100644 (file)
@@ -32,6 +32,8 @@
 #ifndef __ARCH_SPARC_REGFILE_HH__
 #define __ARCH_SPARC_REGFILE_HH__
 
+#include <string>
+
 #include "arch/sparc/floatregfile.hh"
 #include "arch/sparc/intregfile.hh"
 #include "arch/sparc/isa_traits.hh"
@@ -39,8 +41,6 @@
 #include "arch/sparc/types.hh"
 #include "base/types.hh"
 
-#include <string>
-
 class Checkpoint;
 
 namespace SparcISA
index bcc4e196232e33501e9b4b8f9c3a511199bc8bf7..5bbabfcf79f005d2bc6a47313ebe4e3c7eee0cf3 100644 (file)
 #ifndef __ARCH_X86_BIOS_ACPI_HH__
 #define __ARCH_X86_BIOS_ACPI_HH__
 
+#include <string>
+#include <vector>
+
 #include "base/types.hh"
 #include "sim/sim_object.hh"
 
-#include <vector>
-#include <string>
-
 class Port;
 
 class X86ACPIRSDPParams;
index 0cff6cc1640a34a8e738b74baa182b38adab5164..184dd2072be5d36f14974124f467f67713ed4d50 100644 (file)
 #ifndef __ARCH_X86_BIOS_E820_HH__
 #define __ARCH_X86_BIOS_E820_HH__
 
+#include <vector>
+
+#include "base/types.hh"
 #include "params/X86E820Entry.hh"
 #include "params/X86E820Table.hh"
-#include "base/types.hh"
 #include "sim/sim_object.hh"
 
-#include <vector>
-
 class Port;
 
 namespace X86ISA
index e526f9658f58f0a77b533689296de3a74c33ce60..ab4f54bac0ad0c1b58bebc025fa4032d44687162 100644 (file)
@@ -58,9 +58,9 @@
 #include "arch/x86/bios/intelmp.hh"
 #include "arch/x86/isa_traits.hh"
 #include "base/misc.hh"
+#include "base/types.hh"
 #include "mem/port.hh"
 #include "sim/byteswap.hh"
-#include "base/types.hh"
 
 // Config entry types
 #include "params/X86IntelMPBaseConfigEntry.hh"
index 1e49a875aaa648ca05fa6cf52b70411074c27bf5..23ac55a6bf7ef31801f8824082fb69772362579b 100644 (file)
 
 #include "arch/x86/bios/smbios.hh"
 #include "arch/x86/isa_traits.hh"
+#include "base/types.hh"
 #include "mem/port.hh"
 #include "params/X86SMBiosBiosInformation.hh"
 #include "params/X86SMBiosSMBiosStructure.hh"
 #include "params/X86SMBiosSMBiosTable.hh"
 #include "sim/byteswap.hh"
-#include "base/types.hh"
 
 using namespace std;
 
index 688b0a6c5ddd4e3308be8b3bcd6f73d35b90a9eb..d1c537651fe60e5cbd31afec3c4c57c4edca0641 100644 (file)
@@ -91,9 +91,9 @@
 #include <string>
 #include <vector>
 
+#include "base/types.hh"
 #include "enums/Characteristic.hh"
 #include "enums/ExtCharacteristic.hh"
-#include "base/types.hh"
 #include "sim/sim_object.hh"
 
 class FunctionalPort;
index 48f6c671b772076350665e9f29824769d0e4609d..f4a3ab9a6382a074d4c348a62621cbb722ec4e8f 100644 (file)
 
 #include "arch/x86/x86_traits.hh"
 #include "base/bitunion.hh"
+#include "base/types.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "mem/request.hh"
-#include "base/types.hh"
 
 namespace X86ISA
 {
index fad70bf78a0e251135f7bd60af170c1d815346b9..74dcbcbea5d407a6921dce0f94232b22983d2384 100644 (file)
 #ifndef __ARCH_X86_MISCREGFILE_HH__
 #define __ARCH_X86_MISCREGFILE_HH__
 
+#include <string>
+
 #include "arch/x86/faults.hh"
 #include "arch/x86/miscregs.hh"
 #include "arch/x86/types.hh"
 #include "base/types.hh"
 
-#include <string>
-
 class Checkpoint;
 
 namespace X86ISA
index 2c359c2cf4643f74953997e7f15fe491dc9263b2..e21978b1ce339546d695e98cae7c0fd3788b6a8c 100644 (file)
@@ -61,9 +61,9 @@
 #include <iostream>
 #include <string>
 
-#include "base/types.hh"
 #include "base/bitunion.hh"
 #include "base/misc.hh"
+#include "base/types.hh"
 
 class Checkpoint;
 
index 613832cb93ee012dc49426ff493d67c2a349d219..78866bb9e3f2548cf59a69fdf0d9badc4ba9ecc2 100644 (file)
 
 #include "arch/x86/pagetable.hh"
 #include "arch/x86/tlb.hh"
+#include "base/types.hh"
 #include "mem/mem_object.hh"
 #include "mem/packet.hh"
 #include "params/X86PagetableWalker.hh"
-#include "base/types.hh"
 
 class ThreadContext;
 
index 0ae0fd3281cffad6158bd2e12db104c54ddb4028..24276f06cf1780db979231f0071897bbd9d809b0 100644 (file)
@@ -59,8 +59,8 @@
 #include "arch/x86/predecoder.hh"
 #include "base/misc.hh"
 #include "base/trace.hh"
-#include "cpu/thread_context.hh"
 #include "base/types.hh"
+#include "cpu/thread_context.hh"
 
 namespace X86ISA
 {
index 07561fe8a1b23537bf994c94bd8308a4932af086..4f285254ab8a76f90555e684f604b4ac278b8b62 100644 (file)
@@ -58,6 +58,8 @@
 #ifndef __ARCH_X86_REGFILE_HH__
 #define __ARCH_X86_REGFILE_HH__
 
+#include <string>
+
 #include "arch/x86/floatregfile.hh"
 #include "arch/x86/intregfile.hh"
 #include "arch/x86/isa_traits.hh"
@@ -65,8 +67,6 @@
 #include "arch/x86/types.hh"
 #include "base/types.hh"
 
-#include <string>
-
 class Checkpoint;
 class EventManager;
 
index c34411a2f3f1dcad19dc73b84170e42c3b8bda02..9290dc024fc1e28744bd3987c53656f95dad14b6 100644 (file)
@@ -61,9 +61,9 @@
 #include "arch/x86/types.hh"
 #include "base/hashmap.hh"
 #include "base/misc.hh"
+#include "base/types.hh"
 #include "config/full_system.hh"
 #include "cpu/thread_context.hh"
-#include "base/types.hh"
 
 class ThreadContext;
 
index 381695c4064436aeb512d1ffb7253c55eea1388c..8b50bdf9b926c3865d6b4afca6ae8f9957984ffb 100644 (file)
@@ -58,7 +58,7 @@
 #ifndef __ARCH_X86_X86TRAITS_HH__
 #define __ARCH_X86_X86TRAITS_HH__
 
-#include <assert.h>
+#include <cassert>
 
 #include "base/types.hh"
 
index 811f95f54ea2584cebf77046cbb654475a4b5226..05d8129d036366fa515ee2058293198c3d658bb7 100644 (file)
 #ifndef __BASE__CP_ANNOTATE_HH__
 #define __BASE__CP_ANNOTATE_HH__
 
-#include "base/loader/symtab.hh"
-#include "config/cp_annotate.hh"
-#include "base/types.hh"
-#include "sim/serialize.hh"
-#include "sim/startup.hh"
-#include "sim/system.hh"
-
 #include <string>
 #include <list>
 #include <vector>
 #include <map>
+
 #include "base/hashmap.hh"
+#include "base/loader/symtab.hh"
 #include "base/trace.hh"
+#include "base/types.hh"
+#include "config/cp_annotate.hh"
+#include "sim/serialize.hh"
+#include "sim/startup.hh"
+#include "sim/system.hh"
+
 #if CP_ANNOTATE
 #include "params/CPA.hh"
 #endif
index eb1f4b641e28f810e6b63b4162e8b95bb6a8379e..d4b0de70e71386ff934e7263c704db760970bdbc 100644 (file)
@@ -33,8 +33,8 @@
 
 #include <string>
 
-#include "base/types.hh"
 #include "base/crc.hh"
+#include "base/types.hh"
 
 #define ETHER_CRC_POLY_LE 0xedb88320
 #define ETHER_CRC_POLY_BE 0x04c11db6
index 84379b135496b05bfd22903fe746bb0e8e71891b..898a189ef648825f6c19d4a25c51b859c47be2da 100644 (file)
@@ -32,8 +32,8 @@
 #include <string>
 
 #include "base/cprintf.hh"
-#include "base/types.hh"
 #include "base/inet.hh"
+#include "base/types.hh"
 
 using namespace std;
 namespace Net {
index 61d432036e88563e01786813ea1fbbf5d565bbdb..ef9a7d81cc03a4e8bc589bf6de1defa4b9c37737 100644 (file)
@@ -38,8 +38,8 @@
 #include <vector>
 
 #include "base/range.hh"
-#include "dev/etherpkt.hh"
 #include "base/types.hh"
+#include "dev/etherpkt.hh"
 
 #include "dnet/os.h"
 #include "dnet/eth.h"
index 139f6bf158fc0c6da214898c75da32094ac2bfde..a2960e75018120297729ba41f7a89fac3f7c5db3 100644 (file)
  * Authors: Nathan Binkert
  */
 
-#ifndef __INTMATH_HH__
-#define __INTMATH_HH__
+#ifndef __BASE_INTMATH_HH__
+#define __BASE_INTMATH_HH__
 
-#include <assert.h>
+#include <cassert>
 
 #include "base/types.hh"
 
@@ -229,4 +229,4 @@ hex2Int(char c)
   return 0;
 }
 
-#endif // __INTMATH_HH__
+#endif // __BASE_INTMATH_HH__
index 55c324aaa9a42f0f197f0baba0a0aaf3c25f8e1d..65cb133568b521ceedd80c50869f5297d1790ae0 100644 (file)
@@ -38,8 +38,8 @@
 #include "base/misc.hh"
 #include "base/output.hh"
 #include "base/trace.hh"
-#include "base/varargs.hh"
 #include "base/types.hh"
+#include "base/varargs.hh"
 #include "sim/core.hh"
 
 using namespace std;
index 0f237566a522fb48ff56049c552022e45e9f193f..7dcaa094d59a14926ca1c257a8846568ed832bd2 100644 (file)
 #include <signal.h>
 #include <unistd.h>
 
-#include "sim/async.hh"
-#include "base/types.hh"
 #include "base/misc.hh"
 #include "base/pollevent.hh"
+#include "base/types.hh"
+#include "sim/async.hh"
 #include "sim/core.hh"
 #include "sim/serialize.hh"
 
index 024b56982d33ec9710ba4c5a45910cc75231c084..fd2204321fb03013c6bb06d267c6e21ac9e7171c 100644 (file)
@@ -32,8 +32,9 @@
 #ifndef __RES_LIST_HH__
 #define __RES_LIST_HH__
 
+#include <cassert>
+
 #include "base/cprintf.hh"
-#include <assert.h>
 
 #define DEBUG_REMOVE 0
 
index 243d56c3a1ec0ca0b06a009cfa3a4dabac0cdd60..52c0111d8835bb5d7716eeff679912bf56454eb1 100644 (file)
 #include "base/cprintf.hh"
 #include "base/intmath.hh"
 #include "base/refcnt.hh"
-#include "base/str.hh"
 #include "base/stats/info.hh"
 #include "base/stats/types.hh"
 #include "base/stats/visit.hh"
+#include "base/str.hh"
 #include "base/types.hh"
 
 class Callback;
index 91bea45405f9a1369cc73f1383f7e2f76e624f2d..1e3ab0f84ae0e36559b1c31b17019aa358c1bfb9 100644 (file)
@@ -42,8 +42,8 @@
 #include "base/stats/mysql_run.hh"
 #include "base/stats/types.hh"
 #include "base/str.hh"
-#include "base/userinfo.hh"
 #include "base/types.hh"
+#include "base/userinfo.hh"
 
 using namespace std;
 
index f3a549b44167f3623f5044174caaa2e5916f0765..ae2c9db5ebc73d5a6a0791dffba62598db496753 100644 (file)
@@ -32,8 +32,8 @@
 
 #include "base/statistics.hh"
 #include "base/stats/output.hh"
-#include "sim/eventq.hh"
 #include "base/types.hh"
+#include "sim/eventq.hh"
 
 using namespace std;
 
index a1bbe3735162a5bdf473c6b9689ed59297ef67c0..aa0831dfd48532fe0ab7e413dcd50fc93de08d1b 100644 (file)
  *          Nathan Binkert
  */
 
-#ifndef __EXETRACE_HH__
-#define __EXETRACE_HH__
+#ifndef __CPU_EXETRACE_HH__
+#define __CPU_EXETRACE_HH__
 
 #include "base/trace.hh"
-#include "cpu/static_inst.hh"
 #include "base/types.hh"
-#include "sim/insttracer.hh"
+#include "cpu/static_inst.hh"
 #include "params/ExeTracer.hh"
+#include "sim/insttracer.hh"
 
 class ThreadContext;
 
@@ -88,4 +88,4 @@ class ExeTracer : public InstTracer
 
 /* namespace Trace */ }
 
-#endif // __EXETRACE_HH__
+#endif // __CPU_EXETRACE_HH__
index 1a7fc9050d06490864903b8aefb3489e55d2b674..f1b3cacacaf03482e67afa0254116f73a582d29f 100644 (file)
 
 #include "arch/faults.hh"
 #include "arch/isa_traits.hh"
+#include "base/types.hh"
 #include "cpu/inorder/inorder_dyn_inst.hh"
 #include "cpu/inorder/pipeline_traits.hh"
 #include "cpu/inst_seq.hh"
-#include "base/types.hh"
 
 /** Struct that defines the information passed from in between stages */
 /** This information mainly goes forward through the pipeline. */
index eb12873700474f1b2f17897d37fe42b89b8dbcdc..ccc868f15f792602e8b59e6e3a834375867d4768 100644 (file)
  * Authors: Korey Sewell
  */
 
-#ifndef __INORDERTRACE_HH__
-#define __INORDERTRACE_HH__
+#ifndef __CPU_INORDER_INORDER_TRACE_HH__
+#define __CPU_INORDER_INORDER_TRACE_HH__
 
 #include "base/trace.hh"
-#include "cpu/static_inst.hh"
 #include "base/types.hh"
-#include "sim/insttracer.hh"
-#include "params/InOrderTrace.hh"
 #include "cpu/exetrace.hh"
+#include "cpu/static_inst.hh"
+#include "params/InOrderTrace.hh"
+#include "sim/insttracer.hh"
 
 class ThreadContext;
 
-
 namespace Trace {
 
 class InOrderTraceRecord : public ExeTracerRecord
@@ -95,4 +94,4 @@ class InOrderTrace : public InstTracer
 
 /* namespace Trace */ }
 
-#endif // __EXETRACE_HH__
+#endif // __CPU_INORDER_INORDER_TRACE_HH__
index 56fafe93aa7630ceec0035d364bde255139a1560..c4ace4f4b0108191fd4a126c696c83c5040309fb 100644 (file)
  *          Nathan Binkert
  */
 
-#ifndef __INTELTRACE_HH__
-#define __INTELTRACE_HH__
+#ifndef __CPU_INTELTRACE_HH__
+#define __CPU_INTELTRACE_HH__
 
 #include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/static_inst.hh"
 #include "params/IntelTrace.hh"
-#include "base/types.hh"
 #include "sim/insttracer.hh"
 
 class ThreadContext;
 
-
 namespace Trace {
 
 class IntelTraceRecord : public InstRecord
@@ -85,4 +84,4 @@ class IntelTrace : public InstTracer
 
 /* namespace Trace */ }
 
-#endif // __EXETRACE_HH__
+#endif // __CPU_INTELTRACE_HH__
index 19a996ed37147fb364e524c09bf9019a4ec5d8b8..829941d4bc208c5ee994828c797943bf50223676 100644 (file)
  *          Nathan Binkert
  */
 
-#ifndef __LEGIONTRACE_HH__
-#define __LEGIONTRACE_HH__
+#ifndef __CPU_LEGIONTRACE_HH__
+#define __CPU_LEGIONTRACE_HH__
 
 #include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/static_inst.hh"
 #include "params/LegionTrace.hh"
-#include "base/types.hh"
 #include "sim/insttracer.hh"
 
 class ThreadContext;
@@ -78,4 +78,4 @@ class LegionTrace : public InstTracer
 
 /* namespace Trace */ }
 
-#endif // __LEGIONTRACE_HH__
+#endif // __CPU_LEGIONTRACE_HH__
index 12d96e0aef5b14aa0832a2ea4d874b7063b37766..f137e66eeba61707f322e4d1fba5750021c5b28f 100644 (file)
  *          Nathan Binkert
  */
 
-#ifndef __NATIVETRACE_HH__
-#define __NATIVETRACE_HH__
+#ifndef __CPU_NATIVETRACE_HH__
+#define __CPU_NATIVETRACE_HH__
 
+#include "arch/x86/floatregs.hh"
+#include "arch/x86/intregs.hh"
 #include "base/trace.hh"
-#include "cpu/static_inst.hh"
 #include "base/types.hh"
+#include "cpu/static_inst.hh"
 #include "sim/insttracer.hh"
-#include "arch/x86/intregs.hh"
-#include "arch/x86/floatregs.hh"
 
 class ThreadContext;
 
-
 namespace Trace {
 
 class NativeTrace;
@@ -213,4 +212,4 @@ class NativeTrace : public InstTracer
 
 /* namespace Trace */ }
 
-#endif // __EXETRACE_HH__
+#endif // __CPU_NATIVETRACE_HH__
index 7669c6b974152d3930aafde13004d694f7c20611..8b7bb8463d1c2d1820d836c8264febc3bea0a40c 100644 (file)
 #ifndef __CPU_O3_2BIT_LOCAL_PRED_HH__
 #define __CPU_O3_2BIT_LOCAL_PRED_HH__
 
-#include "cpu/o3/sat_counter.hh"
-#include "base/types.hh"
-
 #include <vector>
 
+#include "base/types.hh"
+#include "cpu/o3/sat_counter.hh"
+
 /**
  * Implements a local predictor that uses the PC to index into a table of
  * counters.  Note that any time a pointer to the bp_history is given, it
index 15d34316ee4de268ecb670f07382bb760b384282..4875c03d8a5eeb9d034df7668d7f2802f3e5eb27 100644 (file)
 #ifndef __CPU_O3_BPRED_UNIT_HH__
 #define __CPU_O3_BPRED_UNIT_HH__
 
+#include <list>
+
 #include "base/statistics.hh"
+#include "base/types.hh"
 #include "cpu/inst_seq.hh"
-
 #include "cpu/o3/2bit_local_pred.hh"
 #include "cpu/o3/btb.hh"
 #include "cpu/o3/ras.hh"
 #include "cpu/o3/tournament_pred.hh"
 
-#include "base/types.hh"
-
-#include <list>
-
 class DerivO3CPUParams;
 
 /**
index a486f340d460a5d3cb06d647bbd14524067dedf7..23b836f73d1b6e6c90f5d8efcddbbad36982a491 100644 (file)
@@ -33,9 +33,9 @@
 
 #include <vector>
 
-#include "sim/faults.hh"
-#include "cpu/inst_seq.hh"
 #include "base/types.hh"
+#include "cpu/inst_seq.hh"
+#include "sim/faults.hh"
 
 // Typedef for physical register index type. Although the Impl would be the
 // most likely location for this, there are a few classes that need this
index 96a4aebef2a23e0b688a04f01d253843c50390f3..4d8033a8c44036b22d9cf86952c4fc92444d8d92 100644 (file)
 #include <algorithm>
 #include <cstring>
 
-#include "config/use_checker.hh"
-
 #include "arch/isa_traits.hh"
 #include "arch/utility.hh"
+#include "base/types.hh"
+#include "config/use_checker.hh"
 #include "cpu/checker/cpu.hh"
 #include "cpu/exetrace.hh"
 #include "cpu/o3/fetch.hh"
 #include "mem/packet.hh"
 #include "mem/request.hh"
+#include "params/DerivO3CPU.hh"
 #include "sim/byteswap.hh"
-#include "base/types.hh"
 #include "sim/core.hh"
 
 #if FULL_SYSTEM
@@ -51,8 +51,6 @@
 #include "sim/system.hh"
 #endif // FULL_SYSTEM
 
-#include "params/DerivO3CPU.hh"
-
 template<class Impl>
 void
 DefaultFetch<Impl>::IcachePort::setPeer(Port *port)
index 5537a57e7bd4098f5a24a0847e61f99c1fd32a8d..0b814ccb482cea37e571b96f0f4893ba76a70501 100644 (file)
 
 #include "base/statistics.hh"
 #include "base/timebuf.hh"
+#include "base/types.hh"
 #include "cpu/inst_seq.hh"
 #include "cpu/o3/dep_graph.hh"
 #include "cpu/op_class.hh"
 #include "sim/eventq.hh"
-#include "base/types.hh"
 
 class DerivO3CPUParams;
 class FUPool;
index e9a52fd37a9a028eaf3bb88f8640468ae78eaad8..a36faf79a694cb1e02d1e2a2175afbd8d7c657d4 100644 (file)
 #ifndef __CPU_O3_RAS_HH__
 #define __CPU_O3_RAS_HH__
 
-#include "base/types.hh"
 #include <vector>
 
+#include "base/types.hh"
+
 /** Return address stack class, implements a simple RAS. */
 class ReturnAddrStack
 {
index 88f5e0d07bc4f5e9a392f69969c9831a8b6ab802..57cd2a197b387915f46fab57e7d6252b8c9baffe 100644 (file)
@@ -36,8 +36,8 @@
 #include <utility>
 #include <vector>
 
-#include "cpu/inst_seq.hh"
 #include "base/types.hh"
+#include "cpu/inst_seq.hh"
 
 struct ltseqnum {
     bool operator()(const InstSeqNum &lhs, const InstSeqNum &rhs) const
index 31e539628a0c3f8e2406c28324a3ca0db633e500..96bd43ed6b985960794fa2848003e326d06f9a99 100644 (file)
 #ifndef __CPU_O3_TOURNAMENT_PRED_HH__
 #define __CPU_O3_TOURNAMENT_PRED_HH__
 
-#include "cpu/o3/sat_counter.hh"
-#include "base/types.hh"
 #include <vector>
 
+#include "base/types.hh"
+#include "cpu/o3/sat_counter.hh"
+
 /**
  * Implements a tournament branch predictor, hopefully identical to the one
  * used in the 21264.  It has a local predictor, which uses a local history
index eadd577a4b90c25c998bcc0e4a1017f12c958e9a..bf05884b56393afdb62da39eebfebc28aa8e3aa4 100644 (file)
@@ -35,8 +35,8 @@
 #include <list>
 #include <utility>
 
-#include "cpu/inst_seq.hh"
 #include "base/types.hh"
+#include "cpu/inst_seq.hh"
 
 /**
  * Simple class to hold onto a list of pairs, each pair having a memory
index 8235760b4b511a75658807a3ce5733c2963ef6e5..5af916fb5e80309c19a1f15af48f3d7ae56ba2e8 100644 (file)
@@ -38,8 +38,8 @@
 
 #include "base/statistics.hh"
 #include "base/timebuf.hh"
-#include "cpu/inst_seq.hh"
 #include "base/types.hh"
+#include "cpu/inst_seq.hh"
 
 class FUPool;
 class MemInterface;
index e930ca7d49ee9bc98ea23eb57f80ec59afa9511e..68bb7cd520661d69123c1975fdad8cd71c428bb2 100644 (file)
@@ -31,8 +31,8 @@
 #ifndef __CPU_OZONE_NULL_PREDICTOR_HH__
 #define __CPU_OZONE_NULL_PREDICTOR_HH__
 
-#include "cpu/inst_seq.hh"
 #include "base/types.hh"
+#include "cpu/inst_seq.hh"
 
 template <class Impl>
 class NullPredictor
index ef9f2e712ee79803696fca316ca0652f90238f23..5988f0e7edc754f96d3039f0ff74ab97cced98a7 100644 (file)
  * Authors: Steve Reinhardt
  */
 
-#include "arch/utility.hh"
 #include "arch/faults.hh"
-#include "base/cprintf.hh"
+#include "arch/utility.hh"
 #include "base/cp_annotate.hh"
+#include "base/cprintf.hh"
 #include "base/inifile.hh"
 #include "base/loader/symtab.hh"
 #include "base/misc.hh"
@@ -39,6 +39,7 @@
 #include "base/range.hh"
 #include "base/stats/events.hh"
 #include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/base.hh"
 #include "cpu/exetrace.hh"
 #include "cpu/profile.hh"
@@ -49,9 +50,9 @@
 #include "cpu/thread_context.hh"
 #include "mem/packet.hh"
 #include "mem/request.hh"
+#include "params/BaseSimpleCPU.hh"
 #include "sim/byteswap.hh"
 #include "sim/debug.hh"
-#include "base/types.hh"
 #include "sim/sim_events.hh"
 #include "sim/sim_object.hh"
 #include "sim/stats.hh"
@@ -67,8 +68,6 @@
 #include "mem/mem_object.hh"
 #endif // FULL_SYSTEM
 
-#include "params/BaseSimpleCPU.hh"
-
 using namespace std;
 using namespace TheISA;
 
index 7348a857657da4a2965d9abf41bb87a25c2348c4..35f74a67eee7a6e88a947b2d56cb8178976e01ff 100644 (file)
 #include "arch/isa_traits.hh"
 #include "arch/regfile.hh"
 #include "arch/tlb.hh"
+#include "base/types.hh"
 #include "config/full_system.hh"
 #include "cpu/thread_context.hh"
 #include "cpu/thread_state.hh"
 #include "mem/request.hh"
 #include "sim/byteswap.hh"
 #include "sim/eventq.hh"
-#include "base/types.hh"
 #include "sim/serialize.hh"
 
 class BaseCPU;
index 58a6b798639c665122922caaf5ef7bd04ab51b88..b1298e0e9ec5e2607e36903a5418fa88250a9dc9 100644 (file)
 
 #include "arch/isa_traits.hh"
 #include "arch/utility.hh"
-#include "sim/faults.hh"
 #include "base/bitfield.hh"
 #include "base/hashmap.hh"
 #include "base/misc.hh"
 #include "base/refcnt.hh"
+#include "base/types.hh"
 #include "cpu/op_class.hh"
 #include "sim/faults.hh"
-#include "base/types.hh"
+#include "sim/faults.hh"
 
 // forward declarations
 struct AlphaSimpleImpl;
index 08b9b6e0cb01ca47d0ded0e254329a12e4fe0b24..51ca3cca6482c2917eae442f327ba05beb78cfb8 100644 (file)
 
 #include "arch/regfile.hh"
 #include "arch/types.hh"
+#include "base/types.hh"
 #include "config/full_system.hh"
 #include "mem/request.hh"
+#include "sim/byteswap.hh"
 #include "sim/faults.hh"
-#include "base/types.hh"
 #include "sim/serialize.hh"
-#include "sim/byteswap.hh"
 
 // @todo: Figure out a more architecture independent way to obtain the ITB and
 // DTB pointers.
index 6fae27d319d51a9011575cf298665c744d9085ab..2acaba9a3696970a014bf41c9dcfaa8272f98762 100644 (file)
 #define __DEV_ALPHA_BACKDOOR_HH__
 
 #include "base/range.hh"
+#include "base/types.hh"
 #include "dev/alpha/access.h"
 #include "dev/io_device.hh"
 #include "params/AlphaBackdoor.hh"
-#include "base/types.hh"
 #include "sim/sim_object.hh"
 
 class BaseCPU;
index 519e371525c72279566389bdbaca0c09dc3dfbf0..c47948f5838a6462478c639cd8739d66138fd688 100644 (file)
 #ifndef __DEV_ETHERLINK_HH__
 #define __DEV_ETHERLINK_HH__
 
-#include "dev/etherobject.hh"
+#include "base/types.hh"
 #include "dev/etherint.hh"
+#include "dev/etherobject.hh"
 #include "dev/etherpkt.hh"
 #include "params/EtherLink.hh"
+#include "params/EtherLink.hh"
 #include "sim/eventq.hh"
-#include "base/types.hh"
 #include "sim/sim_object.hh"
-#include "params/EtherLink.hh"
 
 class EtherDump;
 class Checkpoint;
index 4193a730225b7bfd2bfd51bf0cb386923e7e74a3..b7d33887b372c7b0934d0967d605ad8359c4abbc 100644 (file)
@@ -36,9 +36,9 @@
 #ifndef __ETHERPKT_HH__
 #define __ETHERPKT_HH__
 
+#include <cassert>
 #include <iosfwd>
 #include <memory>
-#include <assert.h>
 
 #include "base/refcnt.hh"
 #include "base/types.hh"
index 69d80d81a5031cecd9ebe7110b7c923a54561e9f..30ddc7bcae148fa59612c30b6ffb9bef104866ea 100644 (file)
@@ -37,8 +37,8 @@
 #include <iostream>
 
 #include "base/bitunion.hh"
-#include "sim/eventq.hh"
 #include "base/types.hh"
+#include "sim/eventq.hh"
 #include "sim/serialize.hh"
 
 /** Programmable Interval Timer (Intel 8254) */
index f8995b72b02ff4658540b68d776be66e05f3a39e..70b02c8edf2aa5db341ee694ad07960285e3197c 100755 (executable)
 #define __DEV_MIPS_BACKDOOR_HH__
 
 #include "base/range.hh"
-#include "dev/mips/access.h"
+#include "base/types.hh"
 #include "dev/io_device.hh"
+#include "dev/mips/access.h"
 #include "params/MipsBackdoor.hh"
-#include "base/types.hh"
 #include "sim/sim_object.hh"
 
 class BaseCPU;
index ecaebb663ad3a2d5dc6817c49d8dede4b1d283c0..912ca7f0fd30d2afda9efc4272982029b271cafe 100644 (file)
@@ -38,6 +38,7 @@
 
 #include "base/debug.hh"
 #include "base/inet.hh"
+#include "base/types.hh"
 #include "cpu/thread_context.hh"
 #include "dev/etherlink.hh"
 #include "dev/ns_gige.hh"
@@ -45,7 +46,6 @@
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "params/NSGigE.hh"
-#include "base/types.hh"
 #include "sim/system.hh"
 
 const char *NsRxStateStrings[] =
index ce9ac5984fb6aba24df1d9d2c261c8e70634ba77..ae01e29305be4cc7aec1f1e5ef95b5dfe7f9a237 100644 (file)
 #include "arch/vtophys.hh"
 #include "base/debug.hh"
 #include "base/inet.hh"
-#include "cpu/thread_context.hh"
+#include "base/types.hh"
 #include "cpu/intr_control.hh"
+#include "cpu/thread_context.hh"
 #include "dev/etherlink.hh"
 #include "dev/sinic.hh"
 #include "mem/packet.hh"
 #include "mem/packet_access.hh"
 #include "sim/eventq.hh"
-#include "base/types.hh"
 #include "sim/stats.hh"
 
 using namespace std;
index c2c8057b98bd13e72ab1e59ac9be5f0fa26c2760..8f5f8707e14f1e7f23865bd0c74c0a0e5414f31c 100644 (file)
@@ -31,7 +31,7 @@
 #ifndef __DEV_X86_INTDEV_HH__
 #define __DEV_X86_INTDEV_HH__
 
-#include <assert.h>
+#include <cassert>
 #include <string>
 
 #include "arch/x86/x86_traits.hh"
index c456f478d1c4720aa4742095f537909c69759722..dbb1ef1be1bd42a68e1adfdbaaa673e31f7f5b3f 100644 (file)
@@ -28,7 +28,7 @@
  * Authors: Gabe Black
  */
 
-#include <assert.h>
+#include <cassert>
 
 #include "dev/x86/pc.hh"
 #include "dev/x86/south_bridge.hh"
index 2cc0d15fde3b24f91f1e6ef443a82818549378ec..517aad6fa9febf629efd86d0ed944d41c39fa0cb 100644 (file)
 #include <sys/types.h>
 #include <algorithm>
 
+#include "arch/isa_traits.hh"
+#include "arch/vtophys.hh"
 #include "base/cprintf.hh"
-#include "base/trace.hh"
 #include "base/loader/symtab.hh"
+#include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/thread_context.hh"
 #include "kern/tru64/mbuf.hh"
-#include "base/types.hh"
-#include "sim/system.hh"
 #include "sim/arguments.hh"
-#include "arch/isa_traits.hh"
-#include "arch/vtophys.hh"
+#include "sim/system.hh"
 
 using namespace TheISA;
 
index b1b86ef47d33cdd23500b8eed293ee33270b39e5..d02cba0517bc2a9fab983b740309773157e0b851 100644 (file)
@@ -31,8 +31,8 @@
 #ifndef __MBUF_HH__
 #define __MBUF_HH__
 
-#include "base/types.hh"
 #include "arch/isa_traits.hh"
+#include "base/types.hh"
 
 namespace tru64 {
 
index a55e37e59867118d1f489d168fa04647d4d8ca5c..4de42b538da5ce1f3597e595c262628509247654 100644 (file)
 #include <set>
 #include <list>
 
-#include "base/range.hh"
 #include "base/hashmap.hh"
+#include "base/range.hh"
 #include "base/range_map.hh"
 #include "base/types.hh"
 #include "mem/mem_object.hh"
 #include "mem/packet.hh"
 #include "mem/port.hh"
 #include "mem/request.hh"
-#include "sim/eventq.hh"
 #include "params/Bus.hh"
+#include "sim/eventq.hh"
 
 class Bus : public MemObject
 {
index cf738a340f624ec1aeba2c38f57d6d238189a74a..0940893bca98a3d9585b3fe23fb51a6458deeec2 100644 (file)
  * Cache definitions.
  */
 
-#include "base/types.hh"
 #include "base/fast_alloc.hh"
 #include "base/misc.hh"
 #include "base/range.hh"
-
-#include "mem/cache/cache.hh"
+#include "base/types.hh"
 #include "mem/cache/blk.hh"
+#include "mem/cache/cache.hh"
 #include "mem/cache/mshr.hh"
 #include "mem/cache/prefetch/base.hh"
-
-#include "sim/sim_exit.hh" // for SimExitEvent
-
+#include "sim/sim_exit.hh"
 
 template<class TagStore>
 Cache<TagStore>::Cache(const Params *p, TagStore *tags, BasePrefetcher *pf)
index ee267feb87be614ec14933739083ec8c9cc2244d..726253c62936924cf2fa1896cf607ee2cbec6cd4 100644 (file)
  * Miss Status and Handling Register (MSHR) definitions.
  */
 
-#include <assert.h>
+#include <algorithm>
+#include <cassert>
 #include <string>
 #include <vector>
-#include <algorithm>
 
-#include "mem/cache/mshr.hh"
-#include "sim/core.hh" // for curTick
-#include "base/types.hh"
 #include "base/misc.hh"
+#include "base/types.hh"
 #include "mem/cache/cache.hh"
+#include "mem/cache/mshr.hh"
+#include "sim/core.hh"
 
 using namespace std;
 
index f92d4cb37fd14e330486af6f5043f53afff582bd..0e0121f676c72f15376c12fec6a7e77c8271b0a9 100644 (file)
  * Definitions a fully associative LRU tagstore.
  */
 
+#include <cassert>
 #include <sstream>
 
-#include <assert.h>
-
-#include "mem/cache/tags/fa_lru.hh"
 #include "base/intmath.hh"
 #include "base/misc.hh"
+#include "mem/cache/tags/fa_lru.hh"
 
 using namespace std;
 
index 4eab10c49f917a23fa0133522f49430b4224fe87..23d09d70973c03b91b44d090290f3f3d8654ec72 100644 (file)
  * Declaration of a fully associative LRU tag store.
  */
 
-#ifndef __FA_LRU_HH__
-#define __FA_LRU_HH__
+#ifndef __MEM_CACHE_TAGS_FA_LRU_HH__
+#define __MEM_CACHE_TAGS_FA_LRU_HH__
 
 #include <list>
 
-#include "mem/cache/blk.hh"
-#include "mem/packet.hh"
 #include "base/hashmap.hh"
+#include "mem/cache/blk.hh"
 #include "mem/cache/tags/base.hh"
+#include "mem/packet.hh"
 
 /**
  * A fully associative cache block.
@@ -281,4 +281,4 @@ public:
     }
 };
 
-#endif
+#endif // __MEM_CACHE_TAGS_FA_LRU_HH__
index 1c19420da7d8039672a5393a3bd91898c6d64f62..1008c3a7ce5abfcc8bfd66bb52e8e86e150ee760 100644 (file)
 #include <string>
 
 #include "base/misc.hh"
+#include "base/types.hh"
 #include "mem/cache/tags/iic.hh"
 #include "mem/cache/tags/iic_repl/gen.hh"
 #include "params/GenRepl.hh"
-#include "base/types.hh"
 
 using namespace std;
 
index 91a4cc3097f090c1e9ce1884010e6cd1ebd60510..c792e335076324e474e3b4b82ccf5297ed330d47 100644 (file)
 #include <string>
 #include <list>
 
-#include "cpu/smt.hh"
 #include "base/types.hh"
+#include "cpu/smt.hh"
 #include "sim/sim_object.hh"
 
-
 class IIC;
 
 /**
index 7b6e95e846d4d3453846d7c26f984f62d62c6547..466095ec99d6f546767dd618062992237090609d 100644 (file)
  * Declaration of a LRU tag store.
  */
 
-#ifndef __LRU_HH__
-#define __LRU_HH__
+#ifndef __MEM_CACHE_TAGS_LRU_HH__
+#define __MEM_CACHE_TAGS_LRU_HH__
 
+#include <cassert>
 #include <cstring>
 #include <list>
 
-#include "mem/cache/blk.hh" // base class
-#include "mem/packet.hh" // for inlined functions
-#include <assert.h>
+#include "mem/cache/blk.hh"
 #include "mem/cache/tags/base.hh"
+#include "mem/packet.hh"
 
 class BaseCache;
 
@@ -261,4 +261,4 @@ public:
     virtual void cleanupRefs();
 };
 
-#endif
+#endif // __MEM_CACHE_TAGS_LRU_HH__
index d7b0e785369c074d3955777e88f1fbdcd588baa0..a64da15a695983227a84ce894bd54ded18a54880 100644 (file)
@@ -30,7 +30,8 @@
  * $Id$
  */
 
-#include "assert.h"
+#include <cassert>
+
 #include "mem/gems_common/util.hh"
 
 // Split a string into a head and tail strings on the specified
index 14c6c40a4bcf44e759c49819a3a9dfb5efea0635..6e804b726b647aa05eb73d0ec11fef8008d16f04 100644 (file)
 #include "base/flags.hh"
 #include "base/misc.hh"
 #include "base/printable.hh"
-#include "mem/request.hh"
 #include "base/types.hh"
+#include "mem/request.hh"
 #include "sim/core.hh"
 
-
 struct Packet;
 typedef Packet *PacketPtr;
 typedef uint8_t* PacketDataPtr;
index 461b07a6953ba17ee99282148e8886dd560d6b51..3ce720ad4894b89fa85abb66d824c55da476a4e8 100644 (file)
  * Declaration of a non-full system Page Table.
  */
 
-#ifndef __PAGE_TABLE__
-#define __PAGE_TABLE__
+#ifndef __MEM_PAGE_TABLE_HH__
+#define __MEM_PAGE_TABLE_HH__
 
 #include <string>
 
-#include "sim/faults.hh"
 #include "arch/isa_traits.hh"
 #include "arch/tlb.hh"
 #include "base/hashmap.hh"
-#include "mem/request.hh"
 #include "base/types.hh"
+#include "mem/request.hh"
+#include "sim/faults.hh"
 #include "sim/serialize.hh"
 
 class Process;
@@ -133,4 +133,4 @@ class PageTable
     void unserialize(Checkpoint *cp, const std::string &section);
 };
 
-#endif
+#endif // __MEM_PAGE_TABLE_HH__
index 56849b12d681a5a95f25e8838b4270f867519942..a49c12a5c7c9f138a445b89be14d6a8ee4587577 100644 (file)
 #include "arch/isa_traits.hh"
 #include "base/misc.hh"
 #include "base/random.hh"
+#include "base/types.hh"
 #include "config/full_system.hh"
 #include "mem/packet_access.hh"
 #include "mem/physical.hh"
 #include "sim/eventq.hh"
-#include "base/types.hh"
 
 using namespace std;
 using namespace TheISA;
index 8548e97727e18da4009a21246038ecb87e5d991f..ad88431ef99a9cd3ae015d8f50654072f8ee729a 100644 (file)
  * $Id$
  */
 
-#ifndef DEBUG_H
-#define DEBUG_H
+#ifndef __MEM_RUBY_DEBUG_HH__
+#define __MEM_RUBY_DEBUG_HH__
 
 #include <unistd.h>
 #include <iostream>
 
 #include "config/ruby_debug.hh"
+#include "mem/ruby/common/Global.hh"
 
 extern std::ostream * debug_cout_ptr;
 
@@ -302,5 +303,5 @@ const bool ASSERT_FLAG = true;
   }\
 }
 
-#endif //DEBUG_H
+#endif // __MEM_RUBY_DEBUG_HH__
 
index de2d06e0e2d3e974f71a743cf611969fc0a33ce2..2f42aabcb18f116df279af2d248c74eb006caabb 100644 (file)
@@ -32,8 +32,8 @@
  *
  * */
 
-#ifndef GLOBAL_H
-#define GLOBAL_H
+#ifndef __MEM_RUBY_GLOBAL_HH__
+#define __MEM_RUBY_GLOBAL_HH__
 
 #ifdef SINGLE_LEVEL_CACHE
 const bool TWO_LEVEL_CACHE = false;
@@ -105,5 +105,5 @@ extern inline int max_tokens()
 }
 
 
-#endif //GLOBAL_H
+#endif // __MEM_RUBY_GLOBAL_HH__
 
index aab98cc8c6b8bef30332abcbb418b374d3c1e822..8643360340c1810cfd964518c255472be19be976 100644 (file)
@@ -67,8 +67,8 @@
  * SOFTWARE.
  *------------------------------------------------------------*/
 
-#include <math.h>
-#include <assert.h>
+#include <cassert>
+#include <cmath>
 
 #include "mem/ruby/network/orion/parm_technology.hh"
 #include "mem/ruby/network/orion/SIM_port.hh"
index be308be882c537547eed19206b22e98a1e852c71..bc69c3cc7f73971bf36520065d281d4ddf0c586b 100644 (file)
  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-#include <stdio.h>
+#include <cassert>
+#include <cmath>
+#include <cstdio>
+
 #include "mem/ruby/network/orion/parm_technology.hh"
 #include "mem/ruby/network/orion/power_utils.hh"
-#include <assert.h>
-#include <math.h>
 
 /* ----------- from SIM_power_util.c ------------ */
 
index 911d533a0fc9a8f09bbd482526803b9c8ae63789..3f121f7af18187902e343b9c3efbe0bb32558aad 100644 (file)
  * Authors: Daniel Sanchez
  */
 
+#include <iostream>
+#include <fstream>
 
 #include "arch/isa_traits.hh"
-#include "mem/rubymem.hh"
-#include "sim/eventq.hh"
-#include "base/types.hh"
 #include "base/output.hh"
-
-// Ruby includes
-#include "mem/ruby/system/System.hh"
-#include "mem/ruby/system/Sequencer.hh"
-#include "mem/ruby/init.hh"
+#include "base/types.hh"
 #include "mem/ruby/common/Debug.hh"
-
+#include "mem/ruby/init.hh"
+#include "mem/ruby/system/Sequencer.hh"
+#include "mem/ruby/system/System.hh"
+#include "mem/rubymem.hh"
+#include "sim/eventq.hh"
 #include "sim/sim_exit.hh"
 
-#include <iostream>
-#include <fstream>
-
 using namespace std;
 using namespace TheISA;
 
index 3e4f37a57fb8dbadf07f4c6b5a5bdc44ce6623da..40a00c9d20917c7b84634f0ace9a66a976c02c9e 100644 (file)
@@ -30,9 +30,7 @@
 #ifndef SLICC_GLOBAL_H
 #define SLICC_GLOBAL_H
 
-#include <assert.h> /* slicc needs to include this in order to use classes in
-                     * ../common directory.
-                     */
+#include <cassert>
 
 #include "mem/gems_common/std-includes.hh"
 #include "mem/gems_common/Map.hh"
index eefe106a4fd253df04451160fe562f5aa7d2df97..1ff2d9fe5ab0c3adbe967c43620d957c1a7e63af 100644 (file)
@@ -36,8 +36,8 @@
 
 #include "base/misc.hh"
 #include "base/socket.hh"
-#include "sim/core.hh"
 #include "base/types.hh"
+#include "sim/core.hh"
 #include "sim/startup.hh"
 
 extern const char *compileDate;
index c09f12016eaf072e94bef70a52e19aa4122b28f4..99fde2d5bdee3eed1be692e2fc879dcb2d84e784 100644 (file)
@@ -31,8 +31,8 @@
 %module event
 
 %{
-#include "python/swig/pyevent.hh"
 #include "base/types.hh"
+#include "python/swig/pyevent.hh"
 #include "sim/eventq.hh"
 #include "sim/sim_events.hh"
 #include "sim/sim_exit.hh"
 
 %include "stdint.i"
 %include "std_string.i"
+
 %include "base/types.hh"
-%include "sim/eventq.hh"
 %include "python/swig/pyevent.hh"
+%include "sim/eventq.hh"
 
 struct CountedDrainEvent : public Event
 {
index d11dc323c93fae92b70bae5b78cd99fad1d82594..bc3177f6f70c7a11f3c583b60b248578b78693f4 100644 (file)
@@ -30,8 +30,8 @@
 
 #include <Python.h>
 
-#include "cpu/base.hh"
 #include "base/types.hh"
+#include "cpu/base.hh"
 #include "sim/serialize.hh"
 #include "sim/sim_object.hh"
 #include "sim/system.hh"
index 840aea998fe1ff6177a9b74cda2c6d0c1b3e4e50..c98e44ec25b07b4588ca1220c71a8a83cc511f74 100644 (file)
@@ -37,6 +37,7 @@
 // import these files for SWIG to wrap
 %include "stdint.i"
 %include "std_string.i"
+
 %include "base/types.hh"
 
 class BaseCPU;
index 3cef49e5de0da461eb6a1e7770de8b66b716a347..abc3da812a93b499e17d4c4279e5eaac7086a783 100644 (file)
 #ifndef __SIM_ARGUMENTS_HH__
 #define __SIM_ARGUMENTS_HH__
 
-#include <assert.h>
+#include <cassert>
 
 #include "arch/vtophys.hh"
 #include "base/refcnt.hh"
-#include "mem/vport.hh"
 #include "base/types.hh"
+#include "mem/vport.hh"
 
 class ThreadContext;
 
index 219d306f05a7d60201415f5da3a57d8ba4c05456..29efdeb6f0deda5135559215a16db18c0efdd5aa 100644 (file)
@@ -47,8 +47,8 @@
 #include "base/flags.hh"
 #include "base/misc.hh"
 #include "base/trace.hh"
-#include "sim/serialize.hh"
 #include "base/types.hh"
+#include "sim/serialize.hh"
 
 class EventQueue;       // forward declaration
 
index 2e34740fbc409a86b9338b4bc241f7a01750641d..1e90f1568cea831061fbaebbe9a8211084fe6378 100644 (file)
@@ -39,9 +39,9 @@
 
 #include "base/cprintf.hh"
 #include "base/misc.hh"
+#include "base/types.hh"
 #include "sim/async.hh"
 #include "sim/core.hh"
-#include "base/types.hh"
 #include "sim/init.hh"
 
 using namespace std;
index 23a0a14a6c9e6a8e5b005e7f23881e62cf86c3d7..bcab455192129889abdb593657a849d8eef33106 100644 (file)
@@ -34,9 +34,9 @@
 
 #include "base/bigint.hh"
 #include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/inst_seq.hh"      // for InstSeqNum
 #include "cpu/static_inst.hh"
-#include "base/types.hh"
 #include "sim/sim_object.hh"
 
 class ThreadContext;
index 81ab00f9ea15c6ac9eb7ecd780b057628d4e85f3..f7f5397743e4ae1a3fefcaea245bcae294ffcd13 100644 (file)
  *          Nathan Binkert
  */
 
-#include <assert.h>
+#include <cassert>
 
 #include "base/callback.hh"
 #include "base/inifile.hh"
 #include "base/match.hh"
 #include "base/misc.hh"
-#include "base/trace.hh"
 #include "base/stats/events.hh"
+#include "base/trace.hh"
 #include "base/types.hh"
 #include "sim/sim_object.hh"
 #include "sim/stats.hh"
index 2d3b84e0955c50505d22dc7f1fba9c1aa3fce1ee..0cc603d3fe2dd7137ca8823a754117fd6d66f9fd 100644 (file)
 
 #include "base/misc.hh"
 #include "base/pollevent.hh"
-#include "sim/stat_control.hh"
+#include "base/types.hh"
 #include "sim/async.hh"
 #include "sim/eventq.hh"
-#include "base/types.hh"
 #include "sim/sim_events.hh"
 #include "sim/sim_exit.hh"
 #include "sim/simulate.hh"
+#include "sim/stat_control.hh"
 
 /** Simulate for num_cycles additional cycles.  If num_cycles is -1
  * (the default), do not limit simulation; some other event must
index 4831419b0c0c0e6f0d86b7ed74ef2e8166895351..0d5bf1723c122fedc293da845f72b4c21fd4bc87 100644 (file)
 #include <fcntl.h>
 #include <sys/uio.h>
 
-#include "base/types.hh"
 #include "base/chunk_generator.hh"
 #include "base/intmath.hh"      // for RoundUp
 #include "base/misc.hh"
 #include "base/trace.hh"
+#include "base/types.hh"
 #include "cpu/base.hh"
 #include "cpu/thread_context.hh"
 #include "mem/translating_port.hh"
index a6476624f0083a47ddf7a3eba6dca879674c6520..5ea117cb8711e1331a4acd2fbf3921f6142c2e5f 100644 (file)
@@ -30,8 +30,9 @@
 
 #include <iostream>
 #include <cassert>
-#include "base/types.hh"
+
 #include "base/range_map.hh"
+#include "base/types.hh"
 
 using namespace std;
 
index ec68ba35abf2fa117cfa71252f030d18dd9e7de4..b5d1143010c307c1a9576553bbb6da8f79ad4e08 100644 (file)
@@ -31,8 +31,8 @@
 #include <cassert>
 #include <iostream>
 
-#include "base/types.hh"
 #include "base/range_map.hh"
+#include "base/types.hh"
 
 using namespace std;
 
index 1ab11d767ff4565b8d742e6261a654fa8bf2c533..66b891777bb03cf801c1446a7ded19000cec066b 100644 (file)
@@ -34,7 +34,7 @@
 #include <sys/user.h>
 #include <sys/types.h>
 #include <sys/ptrace.h>
-#include <assert.h>
+#include <cassert>
 #include <string>
 
 #include "tracechild.hh"
index f8c68c770820c7ffc05c459863acb1a000c57be4..e1bdf718f4ae4a87e34d26eab4fe25c4b10d7747 100644 (file)
@@ -34,7 +34,7 @@
 #include <linux/user.h>
 #include <sys/types.h>
 #include <sys/ptrace.h>
-#include <assert.h>
+#include <cassert>
 #include <string>
 
 #include "tracechild.hh"
index 0284fb82ed42ad91c80d30af28762d1234536978..c3a53ac34b0cb58bfbcc625f156191291bca995b 100644 (file)
@@ -32,7 +32,7 @@
 #define TRACECHILD_SPARC_HH
 
 #include <asm-sparc64/reg.h>
-#include <assert.h>
+#include <cassert>
 #include <ostream>
 #include <stdint.h>
 #include <string>