## Currently working on
- - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> with [[lkcl]]
+ - <http://bugs.libre-riscv.org/show_bug.cgi?id=186> POWER Decoder
+ - with [[lkcl]]
- <http://bugs.libre-riscv.org/show_bug.cgi?id=208> CORDIC
- <https://bugs.libre-soc.org/show_bug.cgi?id=272>
- functions needed for simulator
- Shared 90% with [[lkcl]]
+ - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
+ - Formal proof of decoder
+ - EUR 200
## Completed not yet submitted
- Verify FPMAX/MIN
- <https://bugs.libre-soc.org/show_bug.cgi?id=165> parent #196
- Verify FP comparison operators
- - <https://bugs.libre-soc.org/show_bug.cgi?id=211> parent #198
- - Formal proof of decoder
## Submitted for RFP, waiting for payment