@ifset H8/500
@set H8
@end ifset
-@c start-sanitize-Hitachi-SH
@ifset SH
@set H8
@end ifset
-@c end-sanitize-Hitachi-SH
@c ------------
@ifset GENERIC
@settitle Using @value{AS}
@ifinfo
@format
START-INFO-DIR-ENTRY
-* As: (as). The GNU assembler.
+* As:: The GNU assembler.
END-INFO-DIR-ENTRY
@end format
@end ifinfo
@table @code
@item -G @var{num}
-This option sets the largest size of an object that can be referenced
+This option sets the largest size of an object that will be referenced
implicitly with the @code{gp} register. It is only accepted for targets
-that use ECOFF format, such as a DECstation running Ultrix.
+that use ECOFF format, such as a DECstation running Ultrix. The default
+value is 8.
@item -nocpp
@itemx -EB, -EL
@ifclear GENERIC
@ifset H8/300
For information on the H8/300 machine instruction set, see @cite{H8/300
-Series Programming Manual} (Hitachi ADE--602--025).
+Series Programming Manual} (Hitachi ADE--602--025). For the H8/300H,
+see @cite{H8/300H Series Programming Manual} (Hitachi).
@end ifset
@ifset H8/500
For information on the H8/500 machine instruction set, see @cite{H8/500
Series Programming Manual} (Hitachi M21T001).
@end ifset
-@c start-sanitize-Hitachi-SH
@ifset SH
For information on the Hitachi SH machine instruction set, see
@cite{SH-Microcomputer User's Manual} (Hitachi Micro Systems, Inc.).
@end ifset
-@c end-sanitize-Hitachi-SH
@ifset Z8000
For information on the Z8000 machine instruction set, see @cite{Z8000 CPU Technical Manual}
@end ifset
@ifset H8/500
@samp{!} for the H8/500 family;
@end ifset
-@c start-sanitize-Hitachi-SH
@ifset SH
@samp{!} for the Hitachi SH;
@end ifset
-@c end-sanitize-Hitachi-SH
@ifset Z8000
@samp{!} for the Z8000;
@end ifset
@ifset H8
A @dfn{statement} ends at a newline character (@samp{\n}); or (for the
H8/300) a dollar sign (@samp{$}); or (for the
-@c start-sanitize-Hitachi-SH
Hitachi-SH or the
-@c end-sanitize-Hitachi-SH
H8/500) a semicolon
(@samp{;}). The newline or separator character is considered part of
the preceding statement. Newlines and separators within character
@end ifset
@ifset H8
(or dollar sign @samp{$}, for the H8/300; or semicolon @samp{;} for the
-@c start-sanitize-Hitachi-SH
Hitachi SH or
-@c end-sanitize-Hitachi-SH
H8/500)
@end ifset
@end ifset
@end ignore
On the H8/300, H8/500,
-@c start-sanitize-Hitachi-SH
Hitachi SH,
-@c end-sanitize-Hitachi-SH
and AMD 29K architectures, the letter must be
one of the letters @samp{DFPRSX} (in upper or lower case).
the proper run-time addresses.
@ifset H8
For the H8/300 and H8/500,
-@c start-sanitize-Hitachi-SH
and for the Hitachi SH,
-@c end-sanitize-Hitachi-SH
@code{@value{AS}} pads sections if needed to
ensure they end on a word (sixteen bit) boundary.
@end ifset
@ifset H8
On the H8/300 and H8/500 platforms, each subsection is zero-padded to a word
boundary (two bytes).
-@c start-sanitize-Hitachi-SH
The same is true on the Hitachi SH.
-@c end-sanitize-Hitachi-SH
@end ifset
@ifset I960
@c FIXME section padding (alignment)?
@ifset SPECIAL-SYMS
@ifset H8
Symbol names begin with a letter or with one of @samp{._}. On the
-@c start-sanitize-Hitachi-SH
Hitachi SH or the
-@c end-sanitize-Hitachi-SH
H8/500, you can also use @code{$} in symbol names. That character may
be followed by any string of digits, letters, dollar signs (save on the
H8/300), and underscores.
@ifclear GENERIC
@ifset H8
-On the H8/300 and H8/500, @code{.int} emits 16-bit integers.
-@c start-sanitize-Hitachi-SH
-On the Hitachi SH, however, @code{.int} emits 32-bit integers.
-@c end-sanitize-Hitachi-SH
+On the H8/500 and most forms of the H8/300, @code{.int} emits 16-bit
+integers. On the H8/300H and the Hitachi SH, however, @code{.int} emits
+32-bit integers.
@end ifset
@end ifclear
@ifset H8/500
* H8/500-Dependent:: Hitachi H8/500 Dependent Features
@end ifset
-@c start-sanitize-Hitachi-SH
@ifset SH
* SH-Dependent:: Hitachi SH Dependent Features
@end ifset
-@c end-sanitize-Hitachi-SH
@ifset I960
* i960-Dependent:: Intel 80960 Dependent Features
@end ifset
@menu
* H8/300-Dependent:: Hitachi H8/300 Dependent Features
* H8/500-Dependent:: Hitachi H8/500 Dependent Features
-@c start-sanitize-Hitachi-SH
-
* SH-Dependent:: Hitachi SH Dependent Features
-@c end-sanitize-Hitachi-SH
@end menu
@down
@end ifclear
@subsection Register Names
@cindex H8/300 registers
-@cindex registers, H8/300
+@cindex register names, H8/300
You can use predefined symbols of the form @samp{r@var{n}h} and
@samp{r@var{n}l} to refer to the H8/300 registers as sixteen 8-bit
general-purpose registers. @var{n} is a digit from @samp{0} to
to the H8/300 registers as 16-bit registers (you must use this form for
addressing).
+On the H8/300H, you can also use the eight predefined symbols
+@samp{er@var{n}} (@samp{er0} @dots{} @samp{er7}) to refer to the 32-bit
+general purpose registers.
+
The two control registers are called @code{pc} (program counter; a
-16-bit register) and @code{ccr} (condition code register; an 8-bit
-register). @code{r7} is used as the stack pointer, and can also be
-called @code{sp}.
+16-bit register, except on the H8/300H where it is 24 bits) and
+@code{ccr} (condition code register; an 8-bit register). @code{r7} is
+used as the stack pointer, and can also be called @code{sp}.
@node H8/300-Addressing
@subsection Addressing Modes
@item @@(@var{d}, r@var{n})
@itemx @@(@var{d}:16, r@var{n})
-Register indirect: 16-bit displacement @var{d} from register @var{n}.
-(You may specify the @samp{:16} for clarity if you wish, but it is not
-required and has no effect.)
+@itemx @@(@var{d}:24, r@var{n})
+Register indirect: 16-bit or 24-bit displacement @var{d} from register
+@var{n}. (24-bit displacements are only meaningful on the H8/300H.)
@item @@r@var{n}+
Register indirect with post-increment
@item @code{@@}@var{aa}
@itemx @code{@@}@var{aa}:8
@itemx @code{@@}@var{aa}:16
-Absolute address @code{aa}. You may specify the @samp{:8} or @samp{:16}
-for clarity, if you wish; but @code{@value{AS}} neither requires this nor
-uses it---the address size required is taken from context.
+@itemx @code{@@}@var{aa}:24
+Absolute address @code{aa}. (The address size @samp{:24} only makes
+sense on the H8/300H.)
@item #@var{xx}
@itemx #@var{xx}:8
@itemx #@var{xx}:16
-Immediate data @var{xx}. You may specify the @samp{:8} or @samp{:16}
-for clarity, if you wish; but @code{@value{AS}} neither requires this nor
-uses it---the data size required is taken from context.
+@itemx #@var{xx}:32
+Immediate data @var{xx}. You may specify the @samp{:8}, @samp{:16}, or
+@samp{:32} for clarity, if you wish; but @code{@value{AS}} neither
+requires this nor uses it---the data size required is taken from
+context.
@item @code{@@}@code{@@}@var{aa}
@itemx @code{@@}@code{@@}@var{aa}:8
@cindex floating point, H8/300 (@sc{ieee})
@cindex H8/300 floating point (@sc{ieee})
-The H8/300 family uses @sc{ieee} floating-point numbers.
+The H8/300 family has no hardware floating point, but the @code{.float}
+directive generates @sc{ieee} floating-point numbers for compatibility
+with other development tools.
+@page
@node H8/300 Directives
@section H8/300 Machine Directives
@cindex machine directives, H8/300 (none)
@cindex @code{word} directive, H8/300
@cindex @code{int} directive, H8/300
-@code{@value{AS}} has no machine-dependent directives for the H8/300.
-However, on this platform the @samp{.int} and @samp{.word} directives
+@code{@value{AS}} has only one machine-dependent directive for the
+H8/300:
+
+@table @code
+@item .h300h
+@cindex H8/300H, assembling for
+Recognize and emit additional instructions for the H8/300H variant, and
+also make @code{.int} emit 32-bit numbers rather than the usual (16-bit)
+for the H8/300 family.
+@end table
+
+On the H8/300 family (including the H8/300H) @samp{.word} directives
generate 16-bit numbers.
@node H8/300 Opcodes
@cindex mnemonics, H8/300
@cindex instruction summary, H8/300
For detailed information on the H8/300 machine instruction set, see
-@cite{H8/300 Series Programming Manual} (Hitachi ADE--602--025).
+@cite{H8/300 Series Programming Manual} (Hitachi ADE--602--025). For
+information specific to the H8/300H, see @cite{H8/300H Series
+Programming Manual} (Hitachi).
@code{@value{AS}} implements all the standard H8/300 opcodes. No additional
pseudo-instructions are needed on this family.
-The following table summarizes the opcodes and their arguments:
-@c kluge due to lack of group outside example
-@page
+The following table summarizes the H8/300 opcodes, and their arguments.
+Entries marked @samp{*} are opcodes used only on the H8/300H.
+
@smallexample
-@c In texinfo 2.102, @group makes this doublepsace!!
-@c @group
+@c Using @group seems to use the normal baselineskip, not the smallexample
+@c baselineskip; looks approx doublespaced.
@i{Legend:}
Rs @r{source register}
Rd @r{destination register}
+ abs @r{absolute address}
imm @r{immediate data}
- x:3 @r{a bit (as a number between 0 and 7)}
- d:8 @r{eight bit displacement from @code{pc}}
- d:16 @r{sixteen bit displacement from @code{Rs}}
-
-add.b Rs,Rd biand #x:3,Rd
-add.b #imm:8,Rd biand #x:3,@@Rd
-add.w Rs,Rd biand #x:3,@@aa:8
-adds #1,Rd bild #x:3,Rd
-adds #2,Rd bild #x:3,@@Rd
-addx #imm:8,Rd bild #x:3,@@aa:8
-addx Rs,Rd bior #x:3,Rd
-and #imm:8,Rd bior #x:3,@@Rd
-and Rs,Rd bior #x:3,@@aa:8
-andc #imm:8,ccr bist #x:3,Rd
-band #x:3,Rd bist #x:3,@@Rd
-band #x:3,@@Rd bist #x:3,@@aa:8
-bra d:8 bixor #x:3,Rd
-bt d:8 bixor #x:3,@@Rd
-brn d:8 bixor #x:3,@@aa:8
-bf d:8 bld #x:3,Rd
-bhi d:8 bld #x:3,@@Rd
-bls d:8 bld #x:3,@@aa:8
-bcc d:8 bnot #x:3,Rd
-bhs d:8 bnot #x:3,@@Rd
-bcs d:8 bnot #x:3,@@aa:8
-blo d:8 bnot Rs,Rd
-bne d:8 bnot Rs,@@Rd
-beq d:8 bnot Rs,@@aa:8
-bvc d:8 bor #x:3,Rd
-bvs d:8 bor #x:3,@@Rd
-bpl d:8 bor #x:3,@@aa:8
-bmi d:8 bset #x:3,@@Rd
-bge d:8 bset #x:3,@@aa:8
-blt d:8 bset Rs,Rd
-bgt d:8 bset Rs,@@Rd
-ble d:8 bset Rs,@@aa:8
-bclr #x:3,Rd bsr d:8
-bclr #x:3,@@Rd bst #x:3,Rd
-bclr #x:3,@@aa:8 bst #x:3,@@Rd
-bclr Rs,Rd bst #x:3,@@aa:8
-bclr Rs,@@Rd btst #x:3,Rd
-@c @end group
+ disp:N @r{N-bit displacement from a register}
+ pcrel:N @r{N-bit displacement relative to program counter}
+
+ add.b #imm,rd * andc #imm,ccr
+ add.b rs,rd band #imm,rd
+ add.w rs,rd band #imm,@@rd
+* add.w #imm,rd band #imm,@@abs:8
+* add.l rs,rd bra pcrel:8
+* add.l #imm,rd * bra pcrel:16
+ adds #imm,rd bt pcrel:8
+ addx #imm,rd * bt pcrel:16
+ addx rs,rd brn pcrel:8
+ and.b #imm,rd * brn pcrel:16
+ and.b rs,rd bf pcrel:8
+* and.w rs,rd * bf pcrel:16
+* and.w #imm,rd bhi pcrel:8
+* and.l #imm,rd * bhi pcrel:16
+* and.l rs,rd bls pcrel:8
+@page
+* bls pcrel:16 bld #imm,rd
+ bcc pcrel:8 bld #imm,@@rd
+* bcc pcrel:16 bld #imm,@@abs:8
+ bhs pcrel:8 bnot #imm,rd
+* bhs pcrel:16 bnot #imm,@@rd
+ bcs pcrel:8 bnot #imm,@@abs:8
+* bcs pcrel:16 bnot rs,rd
+ blo pcrel:8 bnot rs,@@rd
+* blo pcrel:16 bnot rs,@@abs:8
+ bne pcrel:8 bor #imm,rd
+* bne pcrel:16 bor #imm,@@rd
+ beq pcrel:8 bor #imm,@@abs:8
+* beq pcrel:16 bset #imm,rd
+ bvc pcrel:8 bset #imm,@@rd
+* bvc pcrel:16 bset #imm,@@abs:8
+ bvs pcrel:8 bset rs,rd
+* bvs pcrel:16 bset rs,@@rd
+ bpl pcrel:8 bset rs,@@abs:8
+* bpl pcrel:16 bsr pcrel:8
+ bmi pcrel:8 bsr pcrel:16
+* bmi pcrel:16 bst #imm,rd
+ bge pcrel:8 bst #imm,@@rd
+* bge pcrel:16 bst #imm,@@abs:8
+ blt pcrel:8 btst #imm,rd
+* blt pcrel:16 btst #imm,@@rd
+ bgt pcrel:8 btst #imm,@@abs:8
+* bgt pcrel:16 btst rs,rd
+ ble pcrel:8 btst rs,@@rd
+* ble pcrel:16 btst rs,@@abs:8
+ bclr #imm,rd bxor #imm,rd
+ bclr #imm,@@rd bxor #imm,@@rd
+ bclr #imm,@@abs:8 bxor #imm,@@abs:8
+ bclr rs,rd cmp.b #imm,rd
+ bclr rs,@@rd cmp.b rs,rd
+ bclr rs,@@abs:8 cmp.w rs,rd
+ biand #imm,rd cmp.w rs,rd
+ biand #imm,@@rd * cmp.w #imm,rd
+ biand #imm,@@abs:8 * cmp.l #imm,rd
+ bild #imm,rd * cmp.l rs,rd
+ bild #imm,@@rd daa rs
+ bild #imm,@@abs:8 das rs
+ bior #imm,rd dec.b rs
+ bior #imm,@@rd * dec.w #imm,rd
+ bior #imm,@@abs:8 * dec.l #imm,rd
+ bist #imm,rd divxu.b rs,rd
+ bist #imm,@@rd * divxu.w rs,rd
+ bist #imm,@@abs:8 * divxs.b rs,rd
+ bixor #imm,rd * divxs.w rs,rd
+ bixor #imm,@@rd eepmov
+ bixor #imm,@@abs:8 * eepmovw
+@page
+* exts.w rd mov.w rs,@@abs:16
+* exts.l rd * mov.l #imm,rd
+* extu.w rd * mov.l rs,rd
+* extu.l rd * mov.l @@rs,rd
+ inc rs * mov.l @@(disp:16,rs),rd
+* inc.w #imm,rd * mov.l @@(disp:24,rs),rd
+* inc.l #imm,rd * mov.l @@rs+,rd
+ jmp @@rs * mov.l @@abs:16,rd
+ jmp abs * mov.l @@abs:24,rd
+ jmp @@@@abs:8 * mov.l rs,@@rd
+ jsr @@rs * mov.l rs,@@(disp:16,rd)
+ jsr abs * mov.l rs,@@(disp:24,rd)
+ jsr @@@@abs:8 * mov.l rs,@@-rd
+ ldc #imm,ccr * mov.l rs,@@abs:16
+ ldc rs,ccr * mov.l rs,@@abs:24
+* ldc @@abs:16,ccr movfpe @@abs:16,rd
+* ldc @@abs:24,ccr movtpe rs,@@abs:16
+* ldc @@(disp:16,rs),ccr mulxu.b rs,rd
+* ldc @@(disp:24,rs),ccr * mulxu.w rs,rd
+* ldc @@rs+,ccr * mulxs.b rs,rd
+* ldc @@rs,ccr * mulxs.w rs,rd
+* mov.b @@(disp:24,rs),rd neg.b rs
+* mov.b rs,@@(disp:24,rd) * neg.w rs
+ mov.b @@abs:16,rd * neg.l rs
+ mov.b rs,rd nop
+ mov.b @@abs:8,rd not.b rs
+ mov.b rs,@@abs:8 * not.w rs
+ mov.b rs,rd * not.l rs
+ mov.b #imm,rd or.b #imm,rd
+ mov.b @@rs,rd or.b rs,rd
+ mov.b @@(disp:16,rs),rd * or.w #imm,rd
+ mov.b @@rs+,rd * or.w rs,rd
+ mov.b @@abs:8,rd * or.l #imm,rd
+ mov.b rs,@@rd * or.l rs,rd
+ mov.b rs,@@(disp:16,rd) orc #imm,ccr
+ mov.b rs,@@-rd pop.w rs
+ mov.b rs,@@abs:8 * pop.l rs
+ mov.w rs,@@rd push.w rs
+* mov.w @@(disp:24,rs),rd * push.l rs
+* mov.w rs,@@(disp:24,rd) rotl.b rs
+* mov.w @@abs:24,rd * rotl.w rs
+* mov.w rs,@@abs:24 * rotl.l rs
+ mov.w rs,rd rotr.b rs
+ mov.w #imm,rd * rotr.w rs
+ mov.w @@rs,rd * rotr.l rs
+ mov.w @@(disp:16,rs),rd rotxl.b rs
+ mov.w @@rs+,rd * rotxl.w rs
+ mov.w @@abs:16,rd * rotxl.l rs
+ mov.w rs,@@(disp:16,rd) rotxr.b rs
+ mov.w rs,@@-rd * rotxr.w rs
@page
-@c @group
-btst #x:3,@@Rd mov.w @@(d:16, Rs),Rd
-btst #x:3,@@aa:8 mov.w @@Rs+,Rd
-btst Rs,Rd mov.w @@aa:16,Rd
-btst Rs,@@Rd mov.w Rs,@@Rd
-btst Rs,@@aa:8 mov.w Rs,@@(d:16, Rd)
-bxor #x:3,Rd mov.w Rs,@@-Rd
-bxor #x:3,@@Rd mov.w Rs,@@aa:16
-bxor #x:3,@@aa:8 movfpe @@aa:16,Rd
-cmp.b #imm:8,Rd movtpe Rs,@@aa:16
-cmp.b Rs,Rd mulxu Rs,Rd
-cmp.w Rs,Rd neg Rs
-daa Rs nop
-das Rs not Rs
-dec Rs or #imm:8,Rd
-divxu Rs,Rd or Rs,Rd
-eepmov orc #imm:8,ccr
-inc Rs pop Rs
-jmp @@Rs push Rs
-jmp @@aa:16 rotl Rs
-jmp @@@@aa rotr Rs
-jsr @@Rs rotxl Rs
-jsr @@aa:16 rotxr Rs
-jsr @@@@aa:8 rte
-ldc #imm:8,ccr rts
-ldc Rs,ccr shal Rs
-mov.b Rs,Rd shar Rs
-mov.b #imm:8,Rd shll Rs
-mov.b @@Rs,Rd shlr Rs
-mov.b @@(d:16, Rs),Rd sleep
-mov.b @@Rs+,Rd stc ccr,Rd
-mov.b @@aa:16,Rd sub.b Rs,Rd
-mov.b @@aa:8,Rd sub.w Rs,Rd
-mov.b Rs,@@Rd subs #1,Rd
-mov.b Rs,@@(d:16, Rd) subs #2,Rd
-mov.b Rs,@@-Rd subx #imm:8,Rd
-mov.b Rs,@@aa:16 subx Rs,Rd
-mov.b Rs,@@aa:8 xor #imm:8,Rd
-mov.w Rs,Rd xor Rs,Rd
-mov.w #imm:16,Rd xorc #imm:8,ccr
-mov.w @@Rs,Rd
-@c @end group
+* rotxr.l rs * stc ccr,@@(disp:24,rd)
+ bpt * stc ccr,@@-rd
+ rte * stc ccr,@@abs:16
+ rts * stc ccr,@@abs:24
+ shal.b rs sub.b rs,rd
+* shal.w rs sub.w rs,rd
+* shal.l rs * sub.w #imm,rd
+ shar.b rs * sub.l rs,rd
+* shar.w rs * sub.l #imm,rd
+* shar.l rs subs #imm,rd
+ shll.b rs subx #imm,rd
+* shll.w rs subx rs,rd
+* shll.l rs * trapa #imm
+ shlr.b rs xor #imm,rd
+* shlr.w rs xor rs,rd
+* shlr.l rs * xor.w #imm,rd
+ sleep * xor.w rs,rd
+ stc ccr,rd * xor.l #imm,rd
+* stc ccr,@@rs * xor.l rs,rd
+* stc ccr,@@(disp:16,rd) xorc #imm,ccr
@end smallexample
@cindex size suffixes, H8/300
@cindex H8/300 size suffixes
Four H8/300 instructions (@code{add}, @code{cmp}, @code{mov},
-@code{sub}) are defined with variants using the suffixes @samp{.b} and
-@samp{.w} to specify the size of a memory operand. @code{@value{AS}}
-supports these suffixes, but does not require them; since one of the
-operands is always a register, @code{@value{AS}} can deduce the correct size.
+@code{sub}) are defined with variants using the suffixes @samp{.b},
+@samp{.w}, and @samp{.l} to specify the size of a memory operand.
+@code{@value{AS}} supports these suffixes, but does not require them;
+since one of the operands is always a register, @code{@value{AS}} can
+deduce the correct size.
For example, since @code{r0} refers to a 16-bit register,
@example
mov.w r0,@@foo
@end example
-If you use the size suffixes, @code{@value{AS}} will issue a warning if
-there's a mismatch between the suffix and the register size.
+If you use the size suffixes, @code{@value{AS}} issues a warning when
+the suffix and the register size do not match.
@end ifset
@ifset H8/500
@end smallexample
@end ifset
-@c start-sanitize-Hitachi-SH
@ifset SH
@page
@node SH-Dependent
@end ifset
@end ifset
-@c end-sanitize-Hitachi-SH
@ifset I960
@ifset GENERIC
@page
It ignores the @kbd{-nocpp}, @kbd{-EL}, and @kbd{-EB} options.
-@i{FIXME: What other information do we need to note here?}
+Not all traditional MIPS macro instructions are currently supported.
+Specifically, @code{li.d} and @code{li.s} are not currently supported.
+
+When using @code{@value{GCC}} with MIPS @value{AS}, @code{@value{GCC}}
+must be configured using the -with-gnu-as switch (this is the case for
+Cygnus distributions) or @code{@value{GCC}} must be invoked with the
+-mgas option.
+
+Assembling for a MIPS ECOFF target supports some additional sections
+besides the usual @code{.text}, @code{.data} and @code{.bss}. The
+additional sections are @code{.rdata}, used for readonly data,
+@code{.sdata}, used for small data, and @code{.sbss}, used for small
+common objects.
+
+When assembling for ECOFF, the assembler will automatically use the $gp
+($28) register when forming the address of a small object. Any object
+in the .sdata or .sbss sections is considered to be small. For external
+objects or objects in the @code{.bss} section, the -G switch may be used
+to control the size of objects for which the $gp register will be used;
+the default value is 8, meaning that a reference to any object eight
+bytes or smaller will use $gp. Passing -G 0 to @value{AS} will prevent
+it from using the $gp register. The size of an object in the
+@code{.bss} section is set by the @code{.comm} or @code{.lcomm}
+pseudo-op that defines it. The size of an external object may be set
+using the @code{.extern} pseudo-op. For example, @samp{.extern sym,4}
+declares that the object at @code{sym} is 4 bytes in length, whie
+leaving @code{sym} otherwise undefined.
+
+Using small ECOFF objects requires linker support, and assumes that the
+$gp register has been correctly initialized (normally done automatically
+by the startup code). MIPS ECOFF assembly code must avoid modifying the
+$gp register.
+
+MIPS ECOFF @value{AS} supports several pseudo-ops used for generating
+debugging information which are not support by traditional MIPS
+assemblers. These are @code{.def}, @code{.endef}, @code{.dim},
+@code{.file}, @code{.scl}, @code{.size}, @code{.tag}, @code{.type},
+@code{.val}, @code{.stabd}, @code{.stabn}, and @code{.stabs}. The
+debugging information generated by the three @code{.stab} pseudo-ops can
+only be read by GDB, not by traditional MIPS debuggers (this enhancement
+is required to fully support C++ debugging). These psuedo-ops are
+primarily used by compilers, not assembly language programmers, and are
+described elsewhere in the manual.
@end ifset
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