mibuild: move identifier to platforms

diff --git a/mibuild/platforms/kc705.py b/mibuild/platforms/kc705.py
index 8f6c471a0c9e2f12e0b6009ad9f62ca91286dfec..ee75de645f754d824e3bd0264814e8c9a6d655ba 100644 (file)
--- a/mibuild/platforms/kc705.py
+++ b/mibuild/platforms/kc705.py
@@ -348,6 +348,7 @@ def Platform(*args, toolchain="vivado", **kwargs):
                raise ValueError
 
        class RealPlatform(xilinx_platform):
+               identifier = 0x4B37
                default_clk_name = "clk156"
                default_clk_period = 6.4
                bitgen_opt = "-g LCK_cycle:6 -g Binary:Yes -w -g ConfigRate:12 -g SPI_buswidth:4"

diff --git a/mibuild/platforms/m1.py b/mibuild/platforms/m1.py
index cc1b619f58871ad33bf11de749bf0c6847400da0..5dfffb1c4e26630cb0048e321706aa87ab59f296 100644 (file)
--- a/mibuild/platforms/m1.py
+++ b/mibuild/platforms/m1.py
@@ -119,6 +119,7 @@ _io = [
 ]
 
 class Platform(XilinxISEPlatform):
+       identifier = 0x4D31
        default_clk_name = "clk50"
        default_clk_period = 20
        def __init__(self):

diff --git a/mibuild/platforms/mixxeo.py b/mibuild/platforms/mixxeo.py
index df9eac850685baf44799d70359e5d36f44cdfb79..4c5f0944cc48b36bcb04d5ccc8451a35e276efa0 100644 (file)
--- a/mibuild/platforms/mixxeo.py
+++ b/mibuild/platforms/mixxeo.py
@@ -155,6 +155,7 @@ _io = [
 ]
 
 class Platform(XilinxISEPlatform):
+       identifier = 0x4D58
        default_clk_name = "clk50"
        default_clk_period = 20
        def __init__(self):

diff --git a/mibuild/platforms/papilio_pro.py b/mibuild/platforms/papilio_pro.py
index 0ccd8dd11cd3de45110fd3f28b533491292c2a02..545b7518b3510999ba6a9f139f582cce343b10ed 100644 (file)
--- a/mibuild/platforms/papilio_pro.py
+++ b/mibuild/platforms/papilio_pro.py
@@ -50,6 +50,7 @@ _connectors = [
 ]
 
 class Platform(XilinxISEPlatform):
+       identifier = 0x5050
        default_clk_name = "clk32"
        default_clk_period = 31.25
        def __init__(self):