radeonsi: emit VGT_REUSE_OFF in the right place

clip_regs aren't marked dirty when writes_viewport_index is changed.

Cc: 17.2 <mesa-stable@lists.freedesktop.org>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index cdcac0742c7b4df782f41ab1a190c85cf9a6021b..532388fed5243a6b50e1253fe7cca6f91596ad6a 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -719,12 +719,6 @@ static void si_emit_clip_regs(struct si_context *sctx, struct r600_atom *atom)
                rs->pa_cl_clip_cntl |
                ucp_mask |
                S_028810_CLIP_DISABLE(window_space));
-
-       if (sctx->b.chip_class <= VI) {
-               /* reuse needs to be set off if we write oViewport */
-               radeon_set_context_reg(cs, R_028AB4_VGT_REUSE_OFF,
-                                      S_028AB4_REUSE_OFF(info->writes_viewport_index));
-       }
 }
 
 /*

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 28c2f11c8a7a8eafb321b47281a8e9ce597fe214..af432e0b3c7b9640b37a8828018a998ffe7d67bd 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -836,14 +836,15 @@ static void si_shader_gs(struct si_screen *sscreen, struct si_shader *shader)
 static void si_shader_vs(struct si_screen *sscreen, struct si_shader *shader,
                          struct si_shader_selector *gs)
 {
+       const struct tgsi_shader_info *info = &shader->selector->info;
        struct si_pm4_state *pm4;
        unsigned num_user_sgprs;
        unsigned nparams, vgpr_comp_cnt;
        uint64_t va;
        unsigned oc_lds_en;
        unsigned window_space =
-          shader->selector->info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
-       bool enable_prim_id = shader->key.mono.u.vs_export_prim_id || shader->selector->info.uses_primid;
+          info->properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION];
+       bool enable_prim_id = shader->key.mono.u.vs_export_prim_id || info->uses_primid;
 
        pm4 = si_get_shader_pm4_state(shader);
        if (!pm4)
@@ -870,6 +871,12 @@ static void si_shader_vs(struct si_screen *sscreen, struct si_shader *shader,
                si_pm4_set_reg(pm4, R_028A84_VGT_PRIMITIVEID_EN, 0);
        }
 
+       if (sscreen->b.chip_class <= VI) {
+               /* Reuse needs to be set off if we write oViewport. */
+               si_pm4_set_reg(pm4, R_028AB4_VGT_REUSE_OFF,
+                              S_028AB4_REUSE_OFF(info->writes_viewport_index));
+       }
+
        va = shader->bo->gpu_address;
        si_pm4_add_bo(pm4, shader->bo, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BINARY);