opcodes/

	* sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
	This has been reported as being accepted by the Sun assmebler.

gas/testsuite/

	* gas/sparc/save-args.[sd]: New test.
	* gas/sparc/sparc.exp: Run new test.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 90af146f28be7f80882dde316a985073836498af..fe34a0bff577e6591500445cc88358e0241b72d2 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -7,6 +7,9 @@
        * gas/sparc/v8-movwr-imm.[sd]: New test.
        * gas/sparc/sparc.exp: Run new tests.
 
+       * gas/sparc/save-args.[sd]: New test.
+       * gas/sparc/sparc.exp: Run new test.
+
 2011-09-08  David S. Miller  <davem@davemloft.net>
 
        * gas/sparc/hpcvis3.s: Correct pdistn test.

diff --git a/gas/testsuite/gas/sparc/save-args.d b/gas/testsuite/gas/sparc/save-args.d
new file mode 100644 (file)
index 0000000..ab5b79f
--- /dev/null
+++ b/gas/testsuite/gas/sparc/save-args.d
@@ -0,0 +1,12 @@
+#as: -Av8
+#objdump: -dr
+#name: software traps
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+00000000 <foo>:
+   0:  81 e0 00 00     save 
+   4:  9d e3 bf a0     save  %sp, -96, %sp
+   8:  9d e3 bf a0     save  %sp, -96, %sp

diff --git a/gas/testsuite/gas/sparc/save-args.s b/gas/testsuite/gas/sparc/save-args.s
new file mode 100644 (file)
index 0000000..acaa311
--- /dev/null
+++ b/gas/testsuite/gas/sparc/save-args.s
@@ -0,0 +1,6 @@
+! Test several forms of save argument
+       .text
+foo:
+       save
+       save    %sp, -96, %sp
+       save    -96, %sp, %sp

diff --git a/gas/testsuite/gas/sparc/sparc.exp b/gas/testsuite/gas/sparc/sparc.exp
index f7f8f8f8e6a4b808fc866aa01f4ab52f38c00bc0..faba8e4ebe25b87b930c29b582983f6549b93a90 100644 (file)
--- a/gas/testsuite/gas/sparc/sparc.exp
+++ b/gas/testsuite/gas/sparc/sparc.exp
@@ -53,6 +53,7 @@ if [istarget sparc*-*-*] {
     run_dump_test "imm-plus-rreg"
     run_dump_test "ticc-imm-reg"
     run_dump_test "v8-movwr-imm"
+    run_dump_test "save-args"
     run_dump_test "v9branch1"
     run_dump_test "v9branch2"
     run_dump_test "v9branch3"

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 85512d72331d4fe3824a9dfd53f5934b161b3288..4226182353411b2bfd73b8adf0636426a08ee371 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -12,6 +12,9 @@
        * sparc-opc.c (sparc_opcodes): Add wr alias entries to match above
        mov aliases.
 
+       * sparc-opc.c (sparc_opcodes): Add entry for 'save simm13,regrs1,regrd'
+       This has been reported as being accepted by the Sun assmebler.
+
 2011-09-08  David S. Miller  <davem@davemloft.net>
 
        * sparc-opc.c (pdistn): Destination is integer not float register.

diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c
index 267fc8cc771841972ec61ef3920be7c8580f3bbe..6a31c93ac115687100a7cbfa85ff6ab0c2b6fd4f 100644 (file)
--- a/opcodes/sparc-opc.c
+++ b/opcodes/sparc-opc.c
@@ -684,6 +684,7 @@ const struct sparc_opcode sparc_opcodes[] = {
 
 { "save",      F3(2, 0x3c, 0), F3(~2, ~0x3c, ~0)|ASI(~0),      "1,2,d", 0, v6 },
 { "save",      F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1),              "1,i,d", 0, v6 },
+{ "save",      F3(2, 0x3c, 1), F3(~2, ~0x3c, ~1),              "i,1,d", 0, v6 }, /* Sun assembler compatibility */
 { "save",      0x81e00000,     ~0x81e00000,                    "", F_ALIAS, v6 },
 
 { "ret",  F3(2, 0x38, 1)|RS1(0x1f)|SIMM13(8), F3(~2, ~0x38, ~1)|SIMM13(~8),           "", F_UNBR|F_DELAYED, v6 }, /* jmpl %i7+8,%g0 */