r600g: add a driver query returning the amount of requested VRAM and GTT memory
authorMarek Olšák <maraeo@gmail.com>
Fri, 22 Mar 2013 01:39:42 +0000 (02:39 +0100)
committerMarek Olšák <maraeo@gmail.com>
Tue, 26 Mar 2013 00:28:19 +0000 (01:28 +0100)
src/gallium/drivers/r600/r600_pipe.c
src/gallium/drivers/r600/r600_pipe.h
src/gallium/drivers/r600/r600_query.c
src/gallium/winsys/radeon/drm/radeon_drm_bo.c
src/gallium/winsys/radeon/drm/radeon_drm_bo.h
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
src/gallium/winsys/radeon/drm/radeon_winsys.h

index 0e113a1b82749cce861aef2bd7fcf110f0e0ebc0..443a91eb89f5d4e23c81d7d372a7dd39582faefe 100644 (file)
@@ -1081,8 +1081,11 @@ static int r600_get_driver_query_info(struct pipe_screen *screen,
                                      unsigned index,
                                      struct pipe_driver_query_info *info)
 {
+       struct r600_screen *rscreen = (struct r600_screen*)screen;
        struct pipe_driver_query_info list[] = {
                {"draw-calls", R600_QUERY_DRAW_CALLS, 0},
+               {"requested-VRAM", R600_QUERY_REQUESTED_VRAM, rscreen->info.vram_size, TRUE},
+               {"requested-GTT", R600_QUERY_REQUESTED_GTT, rscreen->info.gart_size, TRUE},
        };
 
        if (!info)
index 9c3a4c2b2296a7b47bfa38c22287b19cd941cadd..541d42e798315af30d5be20c7c4024da315f3d42 100644 (file)
@@ -76,6 +76,8 @@
 #define R600_CONTEXT_FLUSH_AND_INV_DB_META      (1 << 7)
 
 #define R600_QUERY_DRAW_CALLS          (PIPE_QUERY_DRIVER_SPECIFIC + 0)
+#define R600_QUERY_REQUESTED_VRAM      (PIPE_QUERY_DRIVER_SPECIFIC + 1)
+#define R600_QUERY_REQUESTED_GTT       (PIPE_QUERY_DRIVER_SPECIFIC + 2)
 
 struct r600_context;
 struct r600_bytecode;
index 6ee4bbd3a001947cd54d54d9657ae4bdba9ee359..e2072ca27a443241707b8cf20363f9d7d10f724a 100644 (file)
@@ -45,6 +45,8 @@ static struct r600_resource *r600_new_query_buffer(struct r600_context *ctx, uns
        /* Non-GPU queries. */
        switch (type) {
        case R600_QUERY_DRAW_CALLS:
+       case R600_QUERY_REQUESTED_VRAM:
+       case R600_QUERY_REQUESTED_GTT:
                return NULL;
        }
 
@@ -310,6 +312,8 @@ static struct pipe_query *r600_create_query(struct pipe_context *ctx, unsigned q
                break;
        /* Non-GPU queries. */
        case R600_QUERY_DRAW_CALLS:
+       case R600_QUERY_REQUESTED_VRAM:
+       case R600_QUERY_REQUESTED_GTT:
                skip_allocation = true;
                break;
        default:
@@ -361,6 +365,10 @@ static void r600_begin_query(struct pipe_context *ctx, struct pipe_query *query)
        case R600_QUERY_DRAW_CALLS:
                rquery->begin_result = rctx->num_draw_calls;
                return;
+       case R600_QUERY_REQUESTED_VRAM:
+       case R600_QUERY_REQUESTED_GTT:
+               rquery->begin_result = 0;
+               return;
        }
 
        /* Discard the old query buffers. */
@@ -398,6 +406,12 @@ static void r600_end_query(struct pipe_context *ctx, struct pipe_query *query)
        case R600_QUERY_DRAW_CALLS:
                rquery->end_result = rctx->num_draw_calls;
                return;
+       case R600_QUERY_REQUESTED_VRAM:
+               rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_REQUESTED_VRAM_MEMORY);
+               return;
+       case R600_QUERY_REQUESTED_GTT:
+               rquery->end_result = rctx->ws->query_value(rctx->ws, RADEON_REQUESTED_GTT_MEMORY);
+               return;
        }
 
        r600_emit_query_end(rctx, rquery);
@@ -437,6 +451,8 @@ static boolean r600_get_query_buffer_result(struct r600_context *ctx,
        /* Non-GPU queries. */
        switch (query->type) {
        case R600_QUERY_DRAW_CALLS:
+       case R600_QUERY_REQUESTED_VRAM:
+       case R600_QUERY_REQUESTED_GTT:
                result->u64 = query->end_result - query->begin_result;
                return TRUE;
        }
index f4ac526ed889af075c9d40c22ce29ebc2b49728c..61570d0ee765f7f9a6735dbb6bd40cb36c09a75a 100644 (file)
@@ -388,6 +388,11 @@ static void radeon_bo_destroy(struct pb_buffer *_buf)
     }
 
     pipe_mutex_destroy(bo->map_mutex);
+
+    if (bo->initial_domain & RADEON_DOMAIN_VRAM)
+        bo->rws->allocated_vram -= align(bo->base.size, 4096);
+    else if (bo->initial_domain & RADEON_DOMAIN_GTT)
+        bo->rws->allocated_gtt -= align(bo->base.size, 4096);
     FREE(bo);
 }
 
@@ -576,6 +581,7 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
     bo->rws = mgr->rws;
     bo->handle = args.handle;
     bo->va = 0;
+    bo->initial_domain = rdesc->initial_domains;
     pipe_mutex_init(bo->map_mutex);
 
     if (mgr->va) {
@@ -608,6 +614,11 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
         }
     }
 
+    if (rdesc->initial_domains & RADEON_DOMAIN_VRAM)
+        rws->allocated_vram += align(size, 4096);
+    else if (rdesc->initial_domains & RADEON_DOMAIN_GTT)
+        rws->allocated_gtt += align(size, 4096);
+
     return &bo->base;
 }
 
@@ -931,6 +942,9 @@ done:
         }
     }
 
+    ws->allocated_vram += align(open_arg.size, 4096);
+    bo->initial_domain = RADEON_DOMAIN_VRAM;
+
     return (struct pb_buffer*)bo;
 
 fail:
index 82ea14105df6aa4f67d605c897dd465f8e688659..710a04cdc3de3b2028a561beec83d54d41d325d5 100644 (file)
@@ -57,6 +57,7 @@ struct radeon_bo {
     uint32_t name;
     uint64_t va;
     uint64_t va_size;
+    enum radeon_bo_domain initial_domain;
 
     /* how many command streams is this bo referenced in? */
     int num_cs_references;
index 62ba4b1f713f30b6e63a71a4e866ce98a61a886e..d1f76431b19d3faee864947ad298ba65722414dd 100644 (file)
@@ -483,6 +483,20 @@ static uint64_t radeon_query_timestamp(struct radeon_winsys *rws)
     return ts;
 }
 
+static uint64_t radeon_query_value(struct radeon_winsys *rws,
+                                   enum radeon_value_id value)
+{
+    struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws;
+
+    switch (value) {
+    case RADEON_REQUESTED_VRAM_MEMORY:
+        return ws->allocated_vram;
+    case RADEON_REQUESTED_GTT_MEMORY:
+        return ws->allocated_gtt;
+    }
+    return 0;
+}
+
 static unsigned hash_fd(void *key)
 {
     return pointer_to_intptr(key);
@@ -606,6 +620,7 @@ struct radeon_winsys *radeon_drm_winsys_create(int fd)
     ws->base.surface_init = radeon_drm_winsys_surface_init;
     ws->base.surface_best = radeon_drm_winsys_surface_best;
     ws->base.query_timestamp = radeon_query_timestamp;
+    ws->base.query_value = radeon_query_value;
 
     radeon_bomgr_init_functions(ws);
     radeon_drm_cs_init_functions(ws);
index 74eb408151b109619056c74fce6ad23fa19851b1..842579c613844b97b6f1c776ac638ada3ef862b3 100644 (file)
@@ -46,6 +46,8 @@ struct radeon_drm_winsys {
 
     int fd; /* DRM file descriptor */
     int num_cs; /* The number of command streams created. */
+    uint64_t allocated_vram;
+    uint64_t allocated_gtt;
 
     enum radeon_generation gen;
     struct radeon_info info;
index c57a87d7a9b0cf139f690f8b190c02abe5d5fec2..36f1f8e7ec42d257b75537802a70c56804de1246 100644 (file)
@@ -145,6 +145,11 @@ enum ring_type {
     RING_LAST,
 };
 
+enum radeon_value_id {
+   RADEON_REQUESTED_VRAM_MEMORY,
+   RADEON_REQUESTED_GTT_MEMORY,
+};
+
 struct winsys_handle;
 struct radeon_winsys_cs_handle;
 
@@ -483,6 +488,9 @@ struct radeon_winsys {
      * \param ws        The winsys this function is called from.
      */
     uint64_t (*query_timestamp)(struct radeon_winsys *ws);
+
+    uint64_t (*query_value)(struct radeon_winsys *ws,
+                            enum radeon_value_id value);
 };
 
 #endif