operands[4] = gen_rtx (CONST_INT, VOIDmode, low);
}")
-(define_expand "one_cmplsi2"
+(define_insn "one_cmplsi2"
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(not:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
""
- "")
-
-(define_insn ""
- [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
- (not:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
- "TARGET_POWER"
- "{sfi|subfic} %0,%1,-1")
-
-(define_insn ""
- [(set (match_operand:SI 0 "gpc_reg_operand" "=r")
- (not:SI (match_operand:SI 1 "gpc_reg_operand" "r")))]
- "! TARGET_POWER"
"nor %0,%1,%1")
(define_insn ""
[(set_attr "type" "compare")])
(define_insn ""
- [(set (match_operand:CC 2 "cc_reg_operand" "=-x")
+ [(set (match_operand:CC 2 "cc_reg_operand" "=x")
(compare:CC (not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
(const_int 0)))
(set (match_operand:SI 0 "gpc_reg_operand" "=r")