ac/radeonsi: add load_base_vertex() to the abi

Fixes the following piglit tests:

./bin/arb_shader_draw_parameters-basevertex basevertex -auto -fbo
./bin/arb_shader_draw_parameters-basevertex basevertex-baseinstance -auto -fbo

Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
index 253c440a3287263418bb880b64f7419bfd9f9cff..fabecb17869005ea28e9d69bb83d44dbf0f26deb 100644 (file)
--- a/src/amd/common/ac_nir_to_llvm.c
+++ b/src/amd/common/ac_nir_to_llvm.c
@@ -4389,7 +4389,7 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
                break;
        }
        case nir_intrinsic_load_base_vertex: {
-               result = ctx->abi->base_vertex;
+               result = ctx->abi->load_base_vertex(ctx->abi);
                break;
        }
        case nir_intrinsic_load_local_group_size:
@@ -4634,6 +4634,11 @@ static void visit_intrinsic(struct ac_nir_context *ctx,
        }
 }
 
+static LLVMValueRef radv_load_base_vertex(struct ac_shader_abi *abi)
+{
+       return abi->base_vertex;
+}
+
 static LLVMValueRef radv_load_ssbo(struct ac_shader_abi *abi,
                                   LLVMValueRef buffer_ptr, bool write)
 {
@@ -6908,6 +6913,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(LLVMTargetMachineRef tm,
                        ctx.gs_max_out_vertices = shaders[i]->info.gs.vertices_out;
                        ctx.abi.load_inputs = load_gs_input;
                        ctx.abi.emit_primitive = visit_end_primitive;
+                       ctx.abi.load_base_vertex = radv_load_base_vertex;
                } else if (shaders[i]->info.stage == MESA_SHADER_TESS_CTRL) {
                        ctx.tcs_outputs_read = shaders[i]->info.outputs_read;
                        ctx.tcs_patch_outputs_read = shaders[i]->info.patch_outputs_read;

diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h
index 10d41ef9971b61642591c09299cd07bb97fc48cf..09fe32c1363f6d55c85f19d12484e40c0b889350 100644 (file)
--- a/src/amd/common/ac_shader_abi.h
+++ b/src/amd/common/ac_shader_abi.h
@@ -182,6 +182,8 @@ struct ac_shader_abi {
 
        LLVMValueRef (*load_sample_mask_in)(struct ac_shader_abi *abi);
 
+       LLVMValueRef (*load_base_vertex)(struct ac_shader_abi *abi);
+
        /* Whether to clamp the shadow reference value to [0,1]on VI. Radeonsi currently
         * uses it due to promoting D16 to D32, but radv needs it off. */
        bool clamp_shadow_reference;

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index aa9b50a7a29df0f8414fbeef94604f19b2ed68a3..2a50b266f64a5fdd031770a2d84f9d2d7e6310ca 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -6021,6 +6021,7 @@ static bool si_compile_tgsi_main(struct si_shader_context *ctx,
                else
                        ctx->abi.emit_outputs = si_llvm_emit_vs_epilogue;
                bld_base->emit_epilogue = si_tgsi_emit_epilogue;
+               ctx->abi.load_base_vertex = get_base_vertex;
                break;
        case PIPE_SHADER_TESS_CTRL:
                bld_base->emit_fetch_funcs[TGSI_FILE_INPUT] = fetch_input_tcs;