software/libbase: use compiler-rt

diff --git a/software/bios/Makefile b/software/bios/Makefile
index 325ba57d564b96f25db1df83044e2544ce5fbaa1..4d4fcdd4c31a8643a0c0f9db7e6c1b1e7fbfe65c 100644 (file)
--- a/software/bios/Makefile
+++ b/software/bios/Makefile
@@ -18,7 +18,10 @@ bios.elf: linker.ld $(OBJECTS) libs
 bios-rescue.elf: linker-rescue.ld $(OBJECTS) libs
 
 %.elf:
-       $(LD) $(LDFLAGS) -T $< -N -o $@ $(OBJECTS) -L$(M2DIR)/software/libbase -lbase
+       $(LD) $(LDFLAGS) -T $< -N -o $@ $(OBJECTS) \
+               -L$(M2DIR)/software/libbase \
+               -L$(CRTDIR) \
+               -lbase -lcompiler_rt
        chmod -x $@
 
 libs:

diff --git a/software/libbase/Makefile b/software/libbase/Makefile
index cf07ad2fc5f99fac2117b2de7793b63928ce5e35..b5a5ab12e91204cdf80ea0b3cff9637c16f34a92 100644 (file)
--- a/software/libbase/Makefile
+++ b/software/libbase/Makefile
@@ -1,7 +1,7 @@
 M2DIR=../..
 include $(M2DIR)/software/common.mak
 
-OBJECTS=divsi3.o setjmp.o libc.o crc16.o crc32.o console.o timer.o system.o board.o uart.o softfloat.o softfloat-glue.o vsnprintf.o strtod.o
+OBJECTS=setjmp.o libc.o crc16.o crc32.o console.o timer.o system.o board.o uart.o vsnprintf.o strtod.o
 
 all: libbase.a
 

diff --git a/software/libbase/divsi3.c b/software/libbase/divsi3.c
deleted file mode 100644 (file)
index 0e98556..0000000
--- a/software/libbase/divsi3.c
+++ /dev/null
@@ -1,55 +0,0 @@
-#define divnorm(num, den, sign)                \
-{                                              \
-  if(num < 0)                                  \
-    {                                          \
-      num = -num;                              \
-      sign = 1;                                        \
-    }                                          \
-  else                                                 \
-    {                                          \
-      sign = 0;                                        \
-    }                                          \
-                                               \
-  if(den < 0)                                  \
-    {                                          \
-      den = - den;                             \
-      sign = 1 - sign;                         \
-    }                                          \
-}
-
-#define exitdiv(sign, res) if (sign) { res = - res;} return res;
-
-long __divsi3 (long numerator, long denominator);
-long __divsi3 (long numerator, long denominator)
-{
-       int sign;
-       long dividend;
-
-       divnorm(numerator, denominator, sign);
-
-       dividend = (unsigned int)numerator/(unsigned int)denominator;
-       exitdiv(sign, dividend);
-}
-
-long __modsi3 (long numerator, long denominator);
-long __modsi3 (long numerator, long denominator)
-{
-       int sign;
-       long res;
-
-       if(numerator < 0) {
-               numerator = -numerator;
-               sign = 1;
-       } else
-               sign = 0;
-
-       if(denominator < 0)
-               denominator = -denominator;
-
-       res = (unsigned int)numerator % (unsigned int)denominator;
-
-       if(sign)
-               return -res;
-       else
-               return res;
-}

diff --git a/software/libbase/milieu.h b/software/libbase/milieu.h
deleted file mode 100644 (file)
index fd5d814..0000000
--- a/software/libbase/milieu.h
+++ /dev/null
@@ -1,112 +0,0 @@
-
-/*============================================================================
-
-This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic
-Package, Release 2b.
-
-Written by John R. Hauser.  This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704.  Funding was partially provided by the
-National Science Foundation under grant MIP-9311980.  The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
-is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has
-been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
-RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
-AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
-COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
-EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
-INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
-OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) the source code for the derivative work includes prominent notice that
-the work is derivative, and (2) the source code includes prominent notice with
-these four paragraphs for those parts of this code that are retained.
-
-=============================================================================*/
-
-/*----------------------------------------------------------------------------
-| Include common integer types and flags.
-*----------------------------------------------------------------------------*/
-
-/*----------------------------------------------------------------------------
-| One of the macros `BIGENDIAN' or `LITTLEENDIAN' must be defined.
-*----------------------------------------------------------------------------*/
-#define BIGENDIAN
-
-/*----------------------------------------------------------------------------
-| The macro `BITS64' can be defined to indicate that 64-bit integer types are
-| supported by the compiler.
-*----------------------------------------------------------------------------*/
-//#define BITS64
-
-/*----------------------------------------------------------------------------
-| Each of the following `typedef's defines the most convenient type that holds
-| integers of at least as many bits as specified.  For example, `uint8' should
-| be the most convenient type that can hold unsigned integers of as many as
-| 8 bits.  The `flag' type must be able to hold either a 0 or 1.  For most
-| implementations of C, `flag', `uint8', and `int8' should all be `typedef'ed
-| to the same as `int'.
-*----------------------------------------------------------------------------*/
-typedef int flag;
-typedef int uint8;
-typedef int int8;
-typedef int uint16;
-typedef int int16;
-typedef unsigned int uint32;
-typedef signed int int32;
-#ifdef BITS64
-typedef unsigned long long int uint64;
-typedef signed long long int int64;
-#endif
-
-/*----------------------------------------------------------------------------
-| Each of the following `typedef's defines a type that holds integers
-| of _exactly_ the number of bits specified.  For instance, for most
-| implementation of C, `bits16' and `sbits16' should be `typedef'ed to
-| `unsigned short int' and `signed short int' (or `short int'), respectively.
-*----------------------------------------------------------------------------*/
-typedef unsigned char bits8;
-typedef signed char sbits8;
-typedef unsigned short int bits16;
-typedef signed short int sbits16;
-typedef unsigned int bits32;
-typedef signed int sbits32;
-#ifdef BITS64
-typedef unsigned long long int bits64;
-typedef signed long long int sbits64;
-#endif
-
-#ifdef BITS64
-/*----------------------------------------------------------------------------
-| The `LIT64' macro takes as its argument a textual integer literal and
-| if necessary ``marks'' the literal as having a 64-bit integer type.
-| For example, the GNU C Compiler (`gcc') requires that 64-bit literals be
-| appended with the letters `LL' standing for `long long', which is `gcc's
-| name for the 64-bit integer type.  Some compilers may allow `LIT64' to be
-| defined as the identity macro:  `#define LIT64( a ) a'.
-*----------------------------------------------------------------------------*/
-#define LIT64( a ) a##LL
-#endif
-
-/*----------------------------------------------------------------------------
-| The macro `INLINE' can be used before functions that should be inlined.  If
-| a compiler does not support explicit inlining, this macro should be defined
-| to be `static'.
-*----------------------------------------------------------------------------*/
-#define INLINE extern inline
-
-
-/*----------------------------------------------------------------------------
-| Symbolic Boolean literals.
-*----------------------------------------------------------------------------*/
-enum {
-    FALSE = 0,
-    TRUE  = 1
-};
-

diff --git a/software/libbase/softfloat-glue.c b/software/libbase/softfloat-glue.c
deleted file mode 100644 (file)
index 4461637..0000000
--- a/software/libbase/softfloat-glue.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/*     $NetBSD: fplib_glue.c,v 1.2 2000/02/22 01:18:28 mycroft Exp $   */
-
-/*-
- * Copyright (c) 1997 The NetBSD Foundation, Inc.
- * All rights reserved.
- *
- * This code is derived from software contributed to The NetBSD Foundation
- * by Neil A. Carson and Mark Brinicombe
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 3. All advertising materials mentioning features or use of this software
- *    must display the following acknowledgement:
- *     This product includes software developed by the NetBSD
- *     Foundation, Inc. and its contributors.
- * 4. Neither the name of The NetBSD Foundation nor the names of its
- *    contributors may be used to endorse or promote products derived
- *    from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
- * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
- * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
- * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
- * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
- * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
- * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
- * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
- * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
- * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
- * POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "milieu.h"
-#include "softfloat.h"
-
-int __eqsf2(float32 a,float32 b);
-int __eqdf2(float64 a,float64 b);
-int __nesf2(float32 a,float32 b);
-int __nedf2(float64 a,float64 b);
-int __gtsf2(float32 a,float32 b);
-int __gtdf2(float64 a,float64 b);
-int __gesf2(float32 a,float32 b);
-int __gedf2(float64 a,float64 b);
-int __ltsf2(float32 a,float32 b);
-int __ltdf2(float64 a,float64 b);
-int __lesf2(float32 a,float32 b);
-int __ledf2(float64 a,float64 b);
-float32 __negsf2(float32 a);
-float64 __negdf2(float64 a);
-
-/********************************* COMPARISONS ********************************/
-
-/*
- * 'Equal' wrapper. This returns 0 if the numbers are equal, or (1 | -1)
- * otherwise. So we need to invert the output.
- */
-
-int __eqsf2(float32 a,float32 b) {
-       return float32_eq(a,b)?0:1;
-}
-
-int __eqdf2(float64 a,float64 b) {
-       return float64_eq(a,b)?0:1;
-}
-
-/*
- * 'Not Equal' wrapper. This returns -1 or 1 (say, 1!) if the numbers are
- * not equal, 0 otherwise. However no not equal call is provided, so we have
- * to use an 'equal' call and invert the result. The result is already
- * inverted though! Confusing?!
- */
-int __nesf2(float32 a,float32 b) {
-       return float32_eq(a,b)?0:-1;
-}
-
-int __nedf2(float64 a,float64 b) {
-       return float64_eq(a,b)?0:-1;
-}
-
-/*
- * 'Greater Than' wrapper. This returns 1 if the number is greater, 0
- * or -1 otherwise. Unfortunately, no such function exists. We have to
- * instead compare the numbers using the 'less than' calls in order to
- * make up our mind. This means that we can call 'less than or equal' and
- * invert the result.
- */
-int __gtsf2(float32 a,float32 b) {
-       return float32_le(a,b)?0:1;
-}
-
-int __gtdf2(float64 a,float64 b) {
-       return float64_le(a,b)?0:1;
-}
-
-/*
- * 'Greater Than or Equal' wrapper. We emulate this by inverting the result
- * of a 'less than' call.
- */
-int __gesf2(float32 a,float32 b) {
-       return float32_lt(a,b)?-1:0;
-}
-
-int __gedf2(float64 a,float64 b) {
-       return float64_lt(a,b)?-1:0;
-}
-
-/*
- * 'Less Than' wrapper. A 1 from the ARM code needs to be turned into -1.
- */
-int __ltsf2(float32 a,float32 b) {
-       return float32_lt(a,b)?-1:0;
-}
-
-int __ltdf2(float64 a,float64 b) {
-       return float64_lt(a,b)?-1:0;
-}
-
-/*
- * 'Less Than or Equal' wrapper. A 0 must turn into a 1, and a 1 into a 0.
- */
-int __lesf2(float32 a,float32 b) {
-       return float32_le(a,b)?0:1;
-}
-
-int __ledf2(float64 a,float64 b) {
-       return float64_le(a,b)?0:1;
-}
-
-/*
- * Float negate... This isn't provided by the library, but it's hardly the
- * hardest function in the world to write... :) In fact, because of the
- * position in the registers of arguments, the double precision version can
- * go here too ;-)
- */
-float32 __negsf2(float32 a) {
-       return (a ^ 0x80000000);
-}
-
-float64 __negdf2(float64 a) {
-       a.high ^= 0x80000000;
-       return a;
-}
-
-/*
- * 32-bit operations. This is not BSD code.
- */
-float32 __addsf3(float32 a, float32 b);
-float32 __addsf3(float32 a, float32 b)
-{
-       return float32_add(a, b);
-}
-
-float32 __subsf3(float32 a, float32 b);
-float32 __subsf3(float32 a, float32 b)
-{
-       return float32_sub(a, b);
-}
-
-float32 __mulsf3(float32 a, float32 b);
-float32 __mulsf3(float32 a, float32 b)
-{
-       return float32_mul(a, b);
-}
-
-float32 __divsf3(float32 a, float32 b);
-float32 __divsf3(float32 a, float32 b)
-{
-       return float32_div(a, b);
-}
-
-float32 __floatsisf(int32 x);
-float32 __floatsisf(int32 x)
-{
-       return int32_to_float32(x);
-}
-
-float32 __floatunsisf(int32 x);
-float32 __floatunsisf(int32 x)
-{
-       return int32_to_float32(x); // XXX
-}
-
-int32 __fixsfsi(float32 x);
-int32 __fixsfsi(float32 x)
-{
-       return float32_to_int32_round_to_zero(x);
-}
-
-uint32 __fixunssfsi(float32 x);
-uint32 __fixunssfsi(float32 x)
-{
-       return float32_to_int32_round_to_zero(x); // XXX
-}
-
-flag __unordsf2(float32 a, float32 b);
-flag __unordsf2(float32 a, float32 b)
-{
-       /*
-        * The comparison is unordered if either input is a NaN.
-        * Test for this by comparing each operand with itself.
-        * We must perform both comparisons to correctly check for
-        * signalling NaNs.
-        */
-       return 1 ^ (float32_eq(a, a) & float32_eq(b, b));
-}
-
-/*
- * 64-bit operations. This is not BSD code.
- */
-float64 __adddf3(float64 a, float64 b);
-float64 __adddf3(float64 a, float64 b)
-{
-       return float64_add(a, b);
-}
-
-float64 __subdf3(float64 a, float64 b);
-float64 __subdf3(float64 a, float64 b)
-{
-       return float64_sub(a, b);
-}
-
-float64 __muldf3(float64 a, float64 b);
-float64 __muldf3(float64 a, float64 b)
-{
-       return float64_mul(a, b);
-}
-
-float64 __divdf3(float64 a, float64 b);
-float64 __divdf3(float64 a, float64 b)
-{
-       return float64_div(a, b);
-}
-
-float64 __floatsidf(int32 x);
-float64 __floatsidf(int32 x)
-{
-       return int32_to_float64(x);
-}
-
-float64 __floatunsidf(int32 x);
-float64 __floatunsidf(int32 x)
-{
-       return int32_to_float64(x); // XXX
-}
-
-int32 __fixdfsi(float64 x);
-int32 __fixdfsi(float64 x)
-{
-       return float64_to_int32_round_to_zero(x);
-}
-
-uint32 __fixunsdfsi(float64 x);
-uint32 __fixunsdfsi(float64 x)
-{
-       return float64_to_int32_round_to_zero(x); // XXX
-}
-
-flag __unorddf2(float64 a, float64 b);
-flag __unorddf2(float64 a, float64 b)
-{
-       /*
-        * The comparison is unordered if either input is a NaN.
-        * Test for this by comparing each operand with itself.
-        * We must perform both comparisons to correctly check for
-        * signalling NaNs.
-        */
-       return 1 ^ (float64_eq(a, a) & float64_eq(b, b));
-}

diff --git a/software/libbase/softfloat-macros.h b/software/libbase/softfloat-macros.h
deleted file mode 100644 (file)
index b4f7448..0000000
--- a/software/libbase/softfloat-macros.h
+++ /dev/null
@@ -1,627 +0,0 @@
-\r
-/*============================================================================\r
-\r
-This C source fragment is part of the SoftFloat IEC/IEEE Floating-point\r
-Arithmetic Package, Release 2b.\r
-\r
-Written by John R. Hauser.  This work was made possible in part by the\r
-International Computer Science Institute, located at Suite 600, 1947 Center\r
-Street, Berkeley, California 94704.  Funding was partially provided by the\r
-National Science Foundation under grant MIP-9311980.  The original version\r
-of this code was written as part of a project to build a fixed-point vector\r
-processor in collaboration with the University of California at Berkeley,\r
-overseen by Profs. Nelson Morgan and John Wawrzynek.  More information\r
-is available through the Web page `http://www.cs.berkeley.edu/~jhauser/\r
-arithmetic/SoftFloat.html'.\r
-\r
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has\r
-been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES\r
-RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS\r
-AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,\r
-COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE\r
-EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE\r
-INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR\r
-OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.\r
-\r
-Derivative works are acceptable, even for commercial purposes, so long as\r
-(1) the source code for the derivative work includes prominent notice that\r
-the work is derivative, and (2) the source code includes prominent notice with\r
-these four paragraphs for those parts of this code that are retained.\r
-\r
-=============================================================================*/\r
-\r
-/*----------------------------------------------------------------------------\r
-| Shifts `a' right by the number of bits given in `count'.  If any nonzero\r
-| bits are shifted off, they are ``jammed'' into the least significant bit of\r
-| the result by setting the least significant bit to 1.  The value of `count'\r
-| can be arbitrarily large; in particular, if `count' is greater than 32, the\r
-| result will be either 0 or 1, depending on whether `a' is zero or nonzero.\r
-| The result is stored in the location pointed to by `zPtr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void shift32RightJamming( bits32 a, int16 count, bits32 *zPtr )\r
-{\r
-    bits32 z;\r
-\r
-    if ( count == 0 ) {\r
-        z = a;\r
-    }\r
-    else if ( count < 32 ) {\r
-        z = ( a>>count ) | ( ( a<<( ( - count ) & 31 ) ) != 0 );\r
-    }\r
-    else {\r
-        z = ( a != 0 );\r
-    }\r
-    *zPtr = z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the\r
-| number of bits given in `count'.  Any bits shifted off are lost.  The value\r
-| of `count' can be arbitrarily large; in particular, if `count' is greater\r
-| than 64, the result will be 0.  The result is broken into two 32-bit pieces\r
-| which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- shift64Right(\r
-     bits32 a0, bits32 a1, int16 count, bits32 *z0Ptr, bits32 *z1Ptr )\r
-{\r
-    bits32 z0, z1;\r
-    int8 negCount = ( - count ) & 31;\r
-\r
-    if ( count == 0 ) {\r
-        z1 = a1;\r
-        z0 = a0;\r
-    }\r
-    else if ( count < 32 ) {\r
-        z1 = ( a0<<negCount ) | ( a1>>count );\r
-        z0 = a0>>count;\r
-    }\r
-    else {\r
-        z1 = ( count < 64 ) ? ( a0>>( count & 31 ) ) : 0;\r
-        z0 = 0;\r
-    }\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Shifts the 64-bit value formed by concatenating `a0' and `a1' right by the\r
-| number of bits given in `count'.  If any nonzero bits are shifted off, they\r
-| are ``jammed'' into the least significant bit of the result by setting the\r
-| least significant bit to 1.  The value of `count' can be arbitrarily large;\r
-| in particular, if `count' is greater than 64, the result will be either 0\r
-| or 1, depending on whether the concatenation of `a0' and `a1' is zero or\r
-| nonzero.  The result is broken into two 32-bit pieces which are stored at\r
-| the locations pointed to by `z0Ptr' and `z1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- shift64RightJamming(\r
-     bits32 a0, bits32 a1, int16 count, bits32 *z0Ptr, bits32 *z1Ptr )\r
-{\r
-    bits32 z0, z1;\r
-    int8 negCount = ( - count ) & 31;\r
-\r
-    if ( count == 0 ) {\r
-        z1 = a1;\r
-        z0 = a0;\r
-    }\r
-    else if ( count < 32 ) {\r
-        z1 = ( a0<<negCount ) | ( a1>>count ) | ( ( a1<<negCount ) != 0 );\r
-        z0 = a0>>count;\r
-    }\r
-    else {\r
-        if ( count == 32 ) {\r
-            z1 = a0 | ( a1 != 0 );\r
-        }\r
-        else if ( count < 64 ) {\r
-            z1 = ( a0>>( count & 31 ) ) | ( ( ( a0<<negCount ) | a1 ) != 0 );\r
-        }\r
-        else {\r
-            z1 = ( ( a0 | a1 ) != 0 );\r
-        }\r
-        z0 = 0;\r
-    }\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' right\r
-| by 32 _plus_ the number of bits given in `count'.  The shifted result is\r
-| at most 64 nonzero bits; these are broken into two 32-bit pieces which are\r
-| stored at the locations pointed to by `z0Ptr' and `z1Ptr'.  The bits shifted\r
-| off form a third 32-bit result as follows:  The _last_ bit shifted off is\r
-| the most-significant bit of the extra result, and the other 31 bits of the\r
-| extra result are all zero if and only if _all_but_the_last_ bits shifted off\r
-| were all zero.  This extra result is stored in the location pointed to by\r
-| `z2Ptr'.  The value of `count' can be arbitrarily large.\r
-|     (This routine makes more sense if `a0', `a1', and `a2' are considered\r
-| to form a fixed-point value with binary point between `a1' and `a2'.  This\r
-| fixed-point value is shifted right by the number of bits given in `count',\r
-| and the integer part of the result is returned at the locations pointed to\r
-| by `z0Ptr' and `z1Ptr'.  The fractional part of the result may be slightly\r
-| corrupted as described above, and is returned at the location pointed to by\r
-| `z2Ptr'.)\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- shift64ExtraRightJamming(\r
-     bits32 a0,\r
-     bits32 a1,\r
-     bits32 a2,\r
-     int16 count,\r
-     bits32 *z0Ptr,\r
-     bits32 *z1Ptr,\r
-     bits32 *z2Ptr\r
- )\r
-{\r
-    bits32 z0, z1, z2;\r
-    int8 negCount = ( - count ) & 31;\r
-\r
-    if ( count == 0 ) {\r
-        z2 = a2;\r
-        z1 = a1;\r
-        z0 = a0;\r
-    }\r
-    else {\r
-        if ( count < 32 ) {\r
-            z2 = a1<<negCount;\r
-            z1 = ( a0<<negCount ) | ( a1>>count );\r
-            z0 = a0>>count;\r
-        }\r
-        else {\r
-            if ( count == 32 ) {\r
-                z2 = a1;\r
-                z1 = a0;\r
-            }\r
-            else {\r
-                a2 |= a1;\r
-                if ( count < 64 ) {\r
-                    z2 = a0<<negCount;\r
-                    z1 = a0>>( count & 31 );\r
-                }\r
-                else {\r
-                    z2 = ( count == 64 ) ? a0 : ( a0 != 0 );\r
-                    z1 = 0;\r
-                }\r
-            }\r
-            z0 = 0;\r
-        }\r
-        z2 |= ( a2 != 0 );\r
-    }\r
-    *z2Ptr = z2;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Shifts the 64-bit value formed by concatenating `a0' and `a1' left by the\r
-| number of bits given in `count'.  Any bits shifted off are lost.  The value\r
-| of `count' must be less than 32.  The result is broken into two 32-bit\r
-| pieces which are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- shortShift64Left(\r
-     bits32 a0, bits32 a1, int16 count, bits32 *z0Ptr, bits32 *z1Ptr )\r
-{\r
-\r
-    *z1Ptr = a1<<count;\r
-    *z0Ptr =\r
-        ( count == 0 ) ? a0 : ( a0<<count ) | ( a1>>( ( - count ) & 31 ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Shifts the 96-bit value formed by concatenating `a0', `a1', and `a2' left\r
-| by the number of bits given in `count'.  Any bits shifted off are lost.\r
-| The value of `count' must be less than 32.  The result is broken into three\r
-| 32-bit pieces which are stored at the locations pointed to by `z0Ptr',\r
-| `z1Ptr', and `z2Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- shortShift96Left(\r
-     bits32 a0,\r
-     bits32 a1,\r
-     bits32 a2,\r
-     int16 count,\r
-     bits32 *z0Ptr,\r
-     bits32 *z1Ptr,\r
-     bits32 *z2Ptr\r
- )\r
-{\r
-    bits32 z0, z1, z2;\r
-    int8 negCount;\r
-\r
-    z2 = a2<<count;\r
-    z1 = a1<<count;\r
-    z0 = a0<<count;\r
-    if ( 0 < count ) {\r
-        negCount = ( ( - count ) & 31 );\r
-        z1 |= a2>>negCount;\r
-        z0 |= a1>>negCount;\r
-    }\r
-    *z2Ptr = z2;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Adds the 64-bit value formed by concatenating `a0' and `a1' to the 64-bit\r
-| value formed by concatenating `b0' and `b1'.  Addition is modulo 2^64, so\r
-| any carry out is lost.  The result is broken into two 32-bit pieces which\r
-| are stored at the locations pointed to by `z0Ptr' and `z1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- add64(\r
-     bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr )\r
-{\r
-    bits32 z1;\r
-\r
-    z1 = a1 + b1;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = a0 + b0 + ( z1 < a1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Adds the 96-bit value formed by concatenating `a0', `a1', and `a2' to the\r
-| 96-bit value formed by concatenating `b0', `b1', and `b2'.  Addition is\r
-| modulo 2^96, so any carry out is lost.  The result is broken into three\r
-| 32-bit pieces which are stored at the locations pointed to by `z0Ptr',\r
-| `z1Ptr', and `z2Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- add96(\r
-     bits32 a0,\r
-     bits32 a1,\r
-     bits32 a2,\r
-     bits32 b0,\r
-     bits32 b1,\r
-     bits32 b2,\r
-     bits32 *z0Ptr,\r
-     bits32 *z1Ptr,\r
-     bits32 *z2Ptr\r
- )\r
-{\r
-    bits32 z0, z1, z2;\r
-    int8 carry0, carry1;\r
-\r
-    z2 = a2 + b2;\r
-    carry1 = ( z2 < a2 );\r
-    z1 = a1 + b1;\r
-    carry0 = ( z1 < a1 );\r
-    z0 = a0 + b0;\r
-    z1 += carry1;\r
-    z0 += ( z1 < carry1 );\r
-    z0 += carry0;\r
-    *z2Ptr = z2;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Subtracts the 64-bit value formed by concatenating `b0' and `b1' from the\r
-| 64-bit value formed by concatenating `a0' and `a1'.  Subtraction is modulo\r
-| 2^64, so any borrow out (carry out) is lost.  The result is broken into two\r
-| 32-bit pieces which are stored at the locations pointed to by `z0Ptr' and\r
-| `z1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- sub64(\r
-     bits32 a0, bits32 a1, bits32 b0, bits32 b1, bits32 *z0Ptr, bits32 *z1Ptr )\r
-{\r
-\r
-    *z1Ptr = a1 - b1;\r
-    *z0Ptr = a0 - b0 - ( a1 < b1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Subtracts the 96-bit value formed by concatenating `b0', `b1', and `b2' from\r
-| the 96-bit value formed by concatenating `a0', `a1', and `a2'.  Subtraction\r
-| is modulo 2^96, so any borrow out (carry out) is lost.  The result is broken\r
-| into three 32-bit pieces which are stored at the locations pointed to by\r
-| `z0Ptr', `z1Ptr', and `z2Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- sub96(\r
-     bits32 a0,\r
-     bits32 a1,\r
-     bits32 a2,\r
-     bits32 b0,\r
-     bits32 b1,\r
-     bits32 b2,\r
-     bits32 *z0Ptr,\r
-     bits32 *z1Ptr,\r
-     bits32 *z2Ptr\r
- )\r
-{\r
-    bits32 z0, z1, z2;\r
-    int8 borrow0, borrow1;\r
-\r
-    z2 = a2 - b2;\r
-    borrow1 = ( a2 < b2 );\r
-    z1 = a1 - b1;\r
-    borrow0 = ( a1 < b1 );\r
-    z0 = a0 - b0;\r
-    z0 -= ( z1 < borrow1 );\r
-    z1 -= borrow1;\r
-    z0 -= borrow0;\r
-    *z2Ptr = z2;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Multiplies `a' by `b' to obtain a 64-bit product.  The product is broken\r
-| into two 32-bit pieces which are stored at the locations pointed to by\r
-| `z0Ptr' and `z1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void mul32To64( bits32 a, bits32 b, bits32 *z0Ptr, bits32 *z1Ptr )\r
-{\r
-    bits16 aHigh, aLow, bHigh, bLow;\r
-    bits32 z0, zMiddleA, zMiddleB, z1;\r
-\r
-    aLow = a;\r
-    aHigh = a>>16;\r
-    bLow = b;\r
-    bHigh = b>>16;\r
-    z1 = ( (bits32) aLow ) * bLow;\r
-    zMiddleA = ( (bits32) aLow ) * bHigh;\r
-    zMiddleB = ( (bits32) aHigh ) * bLow;\r
-    z0 = ( (bits32) aHigh ) * bHigh;\r
-    zMiddleA += zMiddleB;\r
-    z0 += ( ( (bits32) ( zMiddleA < zMiddleB ) )<<16 ) + ( zMiddleA>>16 );\r
-    zMiddleA <<= 16;\r
-    z1 += zMiddleA;\r
-    z0 += ( z1 < zMiddleA );\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Multiplies the 64-bit value formed by concatenating `a0' and `a1' by `b'\r
-| to obtain a 96-bit product.  The product is broken into three 32-bit pieces\r
-| which are stored at the locations pointed to by `z0Ptr', `z1Ptr', and\r
-| `z2Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- mul64By32To96(\r
-     bits32 a0,\r
-     bits32 a1,\r
-     bits32 b,\r
-     bits32 *z0Ptr,\r
-     bits32 *z1Ptr,\r
-     bits32 *z2Ptr\r
- )\r
-{\r
-    bits32 z0, z1, z2, more1;\r
-\r
-    mul32To64( a1, b, &z1, &z2 );\r
-    mul32To64( a0, b, &z0, &more1 );\r
-    add64( z0, more1, 0, z1, &z0, &z1 );\r
-    *z2Ptr = z2;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Multiplies the 64-bit value formed by concatenating `a0' and `a1' to the\r
-| 64-bit value formed by concatenating `b0' and `b1' to obtain a 128-bit\r
-| product.  The product is broken into four 32-bit pieces which are stored at\r
-| the locations pointed to by `z0Ptr', `z1Ptr', `z2Ptr', and `z3Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE void\r
- mul64To128(\r
-     bits32 a0,\r
-     bits32 a1,\r
-     bits32 b0,\r
-     bits32 b1,\r
-     bits32 *z0Ptr,\r
-     bits32 *z1Ptr,\r
-     bits32 *z2Ptr,\r
-     bits32 *z3Ptr\r
- )\r
-{\r
-    bits32 z0, z1, z2, z3;\r
-    bits32 more1, more2;\r
-\r
-    mul32To64( a1, b1, &z2, &z3 );\r
-    mul32To64( a1, b0, &z1, &more2 );\r
-    add64( z1, more2, 0, z2, &z1, &z2 );\r
-    mul32To64( a0, b0, &z0, &more1 );\r
-    add64( z0, more1, 0, z1, &z0, &z1 );\r
-    mul32To64( a0, b1, &more1, &more2 );\r
-    add64( more1, more2, 0, z2, &more1, &z2 );\r
-    add64( z0, z1, 0, more1, &z0, &z1 );\r
-    *z3Ptr = z3;\r
-    *z2Ptr = z2;\r
-    *z1Ptr = z1;\r
-    *z0Ptr = z0;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns an approximation to the 32-bit integer quotient obtained by dividing\r
-| `b' into the 64-bit value formed by concatenating `a0' and `a1'.  The\r
-| divisor `b' must be at least 2^31.  If q is the exact quotient truncated\r
-| toward zero, the approximation returned lies between q and q + 2 inclusive.\r
-| If the exact quotient q is larger than 32 bits, the maximum positive 32-bit\r
-| unsigned integer is returned.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static bits32 estimateDiv64To32( bits32 a0, bits32 a1, bits32 b )\r
-{\r
-    bits32 b0, b1;\r
-    bits32 rem0, rem1, term0, term1;\r
-    bits32 z;\r
-\r
-    if ( b <= a0 ) return 0xFFFFFFFF;\r
-    b0 = b>>16;\r
-    z = ( b0<<16 <= a0 ) ? 0xFFFF0000 : ( a0 / b0 )<<16;\r
-    mul32To64( b, z, &term0, &term1 );\r
-    sub64( a0, a1, term0, term1, &rem0, &rem1 );\r
-    while ( ( (sbits32) rem0 ) < 0 ) {\r
-        z -= 0x10000;\r
-        b1 = b<<16;\r
-        add64( rem0, rem1, b0, b1, &rem0, &rem1 );\r
-    }\r
-    rem0 = ( rem0<<16 ) | ( rem1>>16 );\r
-    z |= ( b0<<16 <= rem0 ) ? 0xFFFF : rem0 / b0;\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns an approximation to the square root of the 32-bit significand given\r
-| by `a'.  Considered as an integer, `a' must be at least 2^31.  If bit 0 of\r
-| `aExp' (the least significant bit) is 1, the integer returned approximates\r
-| 2^31*sqrt(`a'/2^31), where `a' is considered an integer.  If bit 0 of `aExp'\r
-| is 0, the integer returned approximates 2^31*sqrt(`a'/2^30).  In either\r
-| case, the approximation returned lies strictly within +/-2 of the exact\r
-| value.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static bits32 estimateSqrt32( int16 aExp, bits32 a )\r
-{\r
-    static const bits16 sqrtOddAdjustments[] = {\r
-        0x0004, 0x0022, 0x005D, 0x00B1, 0x011D, 0x019F, 0x0236, 0x02E0,\r
-        0x039C, 0x0468, 0x0545, 0x0631, 0x072B, 0x0832, 0x0946, 0x0A67\r
-    };\r
-    static const bits16 sqrtEvenAdjustments[] = {\r
-        0x0A2D, 0x08AF, 0x075A, 0x0629, 0x051A, 0x0429, 0x0356, 0x029E,\r
-        0x0200, 0x0179, 0x0109, 0x00AF, 0x0068, 0x0034, 0x0012, 0x0002\r
-    };\r
-    int8 index;\r
-    bits32 z;\r
-\r
-    index = ( a>>27 ) & 15;\r
-    if ( aExp & 1 ) {\r
-        z = 0x4000 + ( a>>17 ) - sqrtOddAdjustments[ index ];\r
-        z = ( ( a / z )<<14 ) + ( z<<15 );\r
-        a >>= 1;\r
-    }\r
-    else {\r
-        z = 0x8000 + ( a>>17 ) - sqrtEvenAdjustments[ index ];\r
-        z = a / z + z;\r
-        z = ( 0x20000 <= z ) ? 0xFFFF8000 : ( z<<15 );\r
-        if ( z <= a ) return (bits32) ( ( (sbits32) a )>>1 );\r
-    }\r
-    return ( ( estimateDiv64To32( a, 0, z ) )>>1 ) + ( z>>1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the number of leading 0 bits before the most-significant 1 bit of\r
-| `a'.  If `a' is zero, 32 is returned.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static int8 countLeadingZeros32( bits32 a )\r
-{\r
-    static const int8 countLeadingZerosHigh[] = {\r
-        8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,\r
-        3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,\r
-        2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,\r
-        2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,\r
-        1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\r
-        1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\r
-        1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\r
-        1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,\r
-        0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0\r
-    };\r
-    int8 shiftCount;\r
-\r
-    shiftCount = 0;\r
-    if ( a < 0x10000 ) {\r
-        shiftCount += 16;\r
-        a <<= 16;\r
-    }\r
-    if ( a < 0x1000000 ) {\r
-        shiftCount += 8;\r
-        a <<= 8;\r
-    }\r
-    shiftCount += countLeadingZerosHigh[ a>>24 ];\r
-    return shiftCount;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is\r
-| equal to the 64-bit value formed by concatenating `b0' and `b1'.  Otherwise,\r
-| returns 0.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE flag eq64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )\r
-{\r
-\r
-    return ( a0 == b0 ) && ( a1 == b1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is less\r
-| than or equal to the 64-bit value formed by concatenating `b0' and `b1'.\r
-| Otherwise, returns 0.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE flag le64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )\r
-{\r
-\r
-    return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 <= b1 ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is less\r
-| than the 64-bit value formed by concatenating `b0' and `b1'.  Otherwise,\r
-| returns 0.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE flag lt64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )\r
-{\r
-\r
-    return ( a0 < b0 ) || ( ( a0 == b0 ) && ( a1 < b1 ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the 64-bit value formed by concatenating `a0' and `a1' is not\r
-| equal to the 64-bit value formed by concatenating `b0' and `b1'.  Otherwise,\r
-| returns 0.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE flag ne64( bits32 a0, bits32 a1, bits32 b0, bits32 b1 )\r
-{\r
-\r
-    return ( a0 != b0 ) || ( a1 != b1 );\r
-\r
-}\r
-\r

diff --git a/software/libbase/softfloat-specialize.h b/software/libbase/softfloat-specialize.h
deleted file mode 100644 (file)
index 8b830a5..0000000
--- a/software/libbase/softfloat-specialize.h
+++ /dev/null
@@ -1,242 +0,0 @@
-
-/*============================================================================
-
-This C source fragment is part of the SoftFloat IEC/IEEE Floating-point
-Arithmetic Package, Release 2b.
-
-Written by John R. Hauser.  This work was made possible in part by the
-International Computer Science Institute, located at Suite 600, 1947 Center
-Street, Berkeley, California 94704.  Funding was partially provided by the
-National Science Foundation under grant MIP-9311980.  The original version
-of this code was written as part of a project to build a fixed-point vector
-processor in collaboration with the University of California at Berkeley,
-overseen by Profs. Nelson Morgan and John Wawrzynek.  More information
-is available through the Web page `http://www.cs.berkeley.edu/~jhauser/
-arithmetic/SoftFloat.html'.
-
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has
-been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES
-RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS
-AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,
-COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE
-EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE
-INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR
-OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.
-
-Derivative works are acceptable, even for commercial purposes, so long as
-(1) the source code for the derivative work includes prominent notice that
-the work is derivative, and (2) the source code includes prominent notice with
-these four paragraphs for those parts of this code that are retained.
-
-=============================================================================*/
-
-/*----------------------------------------------------------------------------
-| Underflow tininess-detection mode, statically initialized to default value.
-| (The declaration in `softfloat.h' must match the `int8' type here.)
-*----------------------------------------------------------------------------*/
-int8 float_detect_tininess = float_tininess_after_rounding;
-
-/*----------------------------------------------------------------------------
-| Raises the exceptions specified by `flags'.  Floating-point traps can be
-| defined here if desired.  It is currently not possible for such a trap
-| to substitute a result value.  If traps are not implemented, this routine
-| should be simply `float_exception_flags |= flags;'.
-*----------------------------------------------------------------------------*/
-
-void float_raise( int8 flags )
-{
-
-    float_exception_flags |= flags;
-
-}
-
-/*----------------------------------------------------------------------------
-| Internal canonical NaN format.
-*----------------------------------------------------------------------------*/
-typedef struct {
-    flag sign;
-    bits32 high, low;
-} commonNaNT;
-
-/*----------------------------------------------------------------------------
-| The pattern for a default generated single-precision NaN.
-*----------------------------------------------------------------------------*/
-enum {
-    float32_default_nan = 0xFFFFFFFF
-};
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is a NaN;
-| otherwise returns 0.
-*----------------------------------------------------------------------------*/
-
-flag float32_is_nan( float32 a )
-{
-
-    return ( 0xFF000000 < (bits32) ( a<<1 ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the single-precision floating-point value `a' is a signaling
-| NaN; otherwise returns 0.
-*----------------------------------------------------------------------------*/
-
-flag float32_is_signaling_nan( float32 a )
-{
-
-    return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the result of converting the single-precision floating-point NaN
-| `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
-| exception is raised.
-*----------------------------------------------------------------------------*/
-
-static commonNaNT float32ToCommonNaN( float32 a )
-{
-    commonNaNT z;
-
-    if ( float32_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
-    z.sign = a>>31;
-    z.low = 0;
-    z.high = a<<9;
-    return z;
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the result of converting the canonical NaN `a' to the single-
-| precision floating-point format.
-*----------------------------------------------------------------------------*/
-
-static float32 commonNaNToFloat32( commonNaNT a )
-{
-
-    return ( ( (bits32) a.sign )<<31 ) | 0x7FC00000 | ( a.high>>9 );
-
-}
-
-/*----------------------------------------------------------------------------
-| Takes two single-precision floating-point values `a' and `b', one of which
-| is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
-| signaling NaN, the invalid exception is raised.
-*----------------------------------------------------------------------------*/
-
-static float32 propagateFloat32NaN( float32 a, float32 b )
-{
-    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
-    aIsNaN = float32_is_nan( a );
-    aIsSignalingNaN = float32_is_signaling_nan( a );
-    bIsNaN = float32_is_nan( b );
-    bIsSignalingNaN = float32_is_signaling_nan( b );
-    a |= 0x00400000;
-    b |= 0x00400000;
-    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
-    if ( aIsNaN ) {
-        return ( aIsSignalingNaN & bIsNaN ) ? b : a;
-    }
-    else {
-        return b;
-    }
-
-}
-
-/*----------------------------------------------------------------------------
-| The pattern for a default generated double-precision NaN.  The `high' and
-| `low' values hold the most- and least-significant bits, respectively.
-*----------------------------------------------------------------------------*/
-enum {
-    float64_default_nan_high = 0xFFFFFFFF,
-    float64_default_nan_low  = 0xFFFFFFFF
-};
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is a NaN;
-| otherwise returns 0.
-*----------------------------------------------------------------------------*/
-
-flag float64_is_nan( float64 a )
-{
-
-    return
-           ( 0xFFE00000 <= (bits32) ( a.high<<1 ) )
-        && ( a.low || ( a.high & 0x000FFFFF ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns 1 if the double-precision floating-point value `a' is a signaling
-| NaN; otherwise returns 0.
-*----------------------------------------------------------------------------*/
-
-flag float64_is_signaling_nan( float64 a )
-{
-
-    return
-           ( ( ( a.high>>19 ) & 0xFFF ) == 0xFFE )
-        && ( a.low || ( a.high & 0x0007FFFF ) );
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the result of converting the double-precision floating-point NaN
-| `a' to the canonical NaN format.  If `a' is a signaling NaN, the invalid
-| exception is raised.
-*----------------------------------------------------------------------------*/
-
-static commonNaNT float64ToCommonNaN( float64 a )
-{
-    commonNaNT z;
-
-    if ( float64_is_signaling_nan( a ) ) float_raise( float_flag_invalid );
-    z.sign = a.high>>31;
-    shortShift64Left( a.high, a.low, 12, &z.high, &z.low );
-    return z;
-
-}
-
-/*----------------------------------------------------------------------------
-| Returns the result of converting the canonical NaN `a' to the double-
-| precision floating-point format.
-*----------------------------------------------------------------------------*/
-
-static float64 commonNaNToFloat64( commonNaNT a )
-{
-    float64 z;
-
-    shift64Right( a.high, a.low, 12, &z.high, &z.low );
-    z.high |= ( ( (bits32) a.sign )<<31 ) | 0x7FF80000;
-    return z;
-
-}
-
-/*----------------------------------------------------------------------------
-| Takes two double-precision floating-point values `a' and `b', one of which
-| is a NaN, and returns the appropriate NaN result.  If either `a' or `b' is a
-| signaling NaN, the invalid exception is raised.
-*----------------------------------------------------------------------------*/
-
-static float64 propagateFloat64NaN( float64 a, float64 b )
-{
-    flag aIsNaN, aIsSignalingNaN, bIsNaN, bIsSignalingNaN;
-
-    aIsNaN = float64_is_nan( a );
-    aIsSignalingNaN = float64_is_signaling_nan( a );
-    bIsNaN = float64_is_nan( b );
-    bIsSignalingNaN = float64_is_signaling_nan( b );
-    a.high |= 0x00080000;
-    b.high |= 0x00080000;
-    if ( aIsSignalingNaN | bIsSignalingNaN ) float_raise( float_flag_invalid );
-    if ( aIsNaN ) {
-        return ( aIsSignalingNaN & bIsNaN ) ? b : a;
-    }
-    else {
-        return b;
-    }
-
-}
-

diff --git a/software/libbase/softfloat.c b/software/libbase/softfloat.c
deleted file mode 100644 (file)
index 27a156e..0000000
--- a/software/libbase/softfloat.c
+++ /dev/null
@@ -1,2269 +0,0 @@
-\r
-/*============================================================================\r
-\r
-This C source file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic\r
-Package, Release 2b.\r
-\r
-Written by John R. Hauser.  This work was made possible in part by the\r
-International Computer Science Institute, located at Suite 600, 1947 Center\r
-Street, Berkeley, California 94704.  Funding was partially provided by the\r
-National Science Foundation under grant MIP-9311980.  The original version\r
-of this code was written as part of a project to build a fixed-point vector\r
-processor in collaboration with the University of California at Berkeley,\r
-overseen by Profs. Nelson Morgan and John Wawrzynek.  More information\r
-is available through the Web page `http://www.cs.berkeley.edu/~jhauser/\r
-arithmetic/SoftFloat.html'.\r
-\r
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has\r
-been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES\r
-RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS\r
-AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,\r
-COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE\r
-EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE\r
-INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR\r
-OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.\r
-\r
-Derivative works are acceptable, even for commercial purposes, so long as\r
-(1) the source code for the derivative work includes prominent notice that\r
-the work is derivative, and (2) the source code includes prominent notice with\r
-these four paragraphs for those parts of this code that are retained.\r
-\r
-=============================================================================*/\r
-\r
-#include "milieu.h"\r
-#include "softfloat.h"\r
-\r
-/*----------------------------------------------------------------------------\r
-| Floating-point rounding mode and exception flags.\r
-*----------------------------------------------------------------------------*/\r
-int8 float_rounding_mode = float_round_nearest_even;\r
-int8 float_exception_flags = 0;\r
-\r
-/*----------------------------------------------------------------------------\r
-| Primitive arithmetic functions, including multi-word arithmetic, and\r
-| division and square root approximations.  (Can be specialized to target if\r
-| desired.)\r
-*----------------------------------------------------------------------------*/\r
-#include "softfloat-macros.h"\r
-\r
-/*----------------------------------------------------------------------------\r
-| Functions and definitions to determine:  (1) whether tininess for underflow\r
-| is detected before or after rounding by default, (2) what (if anything)\r
-| happens when exceptions are raised, (3) how signaling NaNs are distinguished\r
-| from quiet NaNs, (4) the default generated quiet NaNs, and (4) how NaNs\r
-| are propagated from function inputs to output.  These details are target-\r
-| specific.\r
-*----------------------------------------------------------------------------*/\r
-#include "softfloat-specialize.h"\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the fraction bits of the single-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE bits32 extractFloat32Frac( float32 a )\r
-{\r
-\r
-    return a & 0x007FFFFF;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the exponent bits of the single-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE int16 extractFloat32Exp( float32 a )\r
-{\r
-\r
-    return ( a>>23 ) & 0xFF;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the sign bit of the single-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE flag extractFloat32Sign( float32 a )\r
-{\r
-\r
-    return a>>31;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Normalizes the subnormal single-precision floating-point value represented\r
-| by the denormalized significand `aSig'.  The normalized exponent and\r
-| significand are stored at the locations pointed to by `zExpPtr' and\r
-| `zSigPtr', respectively.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static void\r
- normalizeFloat32Subnormal( bits32 aSig, int16 *zExpPtr, bits32 *zSigPtr )\r
-{\r
-    int8 shiftCount;\r
-\r
-    shiftCount = countLeadingZeros32( aSig ) - 8;\r
-    *zSigPtr = aSig<<shiftCount;\r
-    *zExpPtr = 1 - shiftCount;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a\r
-| single-precision floating-point value, returning the result.  After being\r
-| shifted into the proper positions, the three fields are simply added\r
-| together to form the result.  This means that any integer portion of `zSig'\r
-| will be added into the exponent.  Since a properly normalized significand\r
-| will have an integer portion equal to 1, the `zExp' input should be 1 less\r
-| than the desired result exponent whenever `zSig' is a complete, normalized\r
-| significand.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE float32 packFloat32( flag zSign, int16 zExp, bits32 zSig )\r
-{\r
-\r
-    return ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<23 ) + zSig;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand `zSig', and returns the proper single-precision floating-\r
-| point value corresponding to the abstract input.  Ordinarily, the abstract\r
-| value is simply rounded and packed into the single-precision format, with\r
-| the inexact exception raised if the abstract input cannot be represented\r
-| exactly.  However, if the abstract value is too large, the overflow and\r
-| inexact exceptions are raised and an infinity or maximal finite value is\r
-| returned.  If the abstract value is too small, the input value is rounded to\r
-| a subnormal number, and the underflow and inexact exceptions are raised if\r
-| the abstract input cannot be represented exactly as a subnormal single-\r
-| precision floating-point number.\r
-|     The input significand `zSig' has its binary point between bits 30\r
-| and 29, which is 7 bits to the left of the usual location.  This shifted\r
-| significand must be normalized or smaller.  If `zSig' is not normalized,\r
-| `zExp' must be 0; in that case, the result returned is a subnormal number,\r
-| and it must not require rounding.  In the usual case that `zSig' is\r
-| normalized, `zExp' must be 1 less than the ``true'' floating-point exponent.\r
-| The handling of underflow and overflow follows the IEC/IEEE Standard for\r
-| Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float32 roundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )\r
-{\r
-    int8 roundingMode;\r
-    flag roundNearestEven;\r
-    int8 roundIncrement, roundBits;\r
-    flag isTiny;\r
-\r
-    roundingMode = float_rounding_mode;\r
-    roundNearestEven = roundingMode == float_round_nearest_even;\r
-    roundIncrement = 0x40;\r
-    if ( ! roundNearestEven ) {\r
-        if ( roundingMode == float_round_to_zero ) {\r
-            roundIncrement = 0;\r
-        }\r
-        else {\r
-            roundIncrement = 0x7F;\r
-            if ( zSign ) {\r
-                if ( roundingMode == float_round_up ) roundIncrement = 0;\r
-            }\r
-            else {\r
-                if ( roundingMode == float_round_down ) roundIncrement = 0;\r
-            }\r
-        }\r
-    }\r
-    roundBits = zSig & 0x7F;\r
-    if ( 0xFD <= (bits16) zExp ) {\r
-        if (    ( 0xFD < zExp )\r
-             || (    ( zExp == 0xFD )\r
-                  && ( (sbits32) ( zSig + roundIncrement ) < 0 ) )\r
-           ) {\r
-            float_raise( float_flag_overflow | float_flag_inexact );\r
-            return packFloat32( zSign, 0xFF, 0 ) - ( roundIncrement == 0 );\r
-        }\r
-        if ( zExp < 0 ) {\r
-            isTiny =\r
-                   ( float_detect_tininess == float_tininess_before_rounding )\r
-                || ( zExp < -1 )\r
-                || ( zSig + roundIncrement < 0x80000000 );\r
-            shift32RightJamming( zSig, - zExp, &zSig );\r
-            zExp = 0;\r
-            roundBits = zSig & 0x7F;\r
-            if ( isTiny && roundBits ) float_raise( float_flag_underflow );\r
-        }\r
-    }\r
-    if ( roundBits ) float_exception_flags |= float_flag_inexact;\r
-    zSig = ( zSig + roundIncrement )>>7;\r
-    zSig &= ~ ( ( ( roundBits ^ 0x40 ) == 0 ) & roundNearestEven );\r
-    if ( zSig == 0 ) zExp = 0;\r
-    return packFloat32( zSign, zExp, zSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand `zSig', and returns the proper single-precision floating-\r
-| point value corresponding to the abstract input.  This routine is just like\r
-| `roundAndPackFloat32' except that `zSig' does not have to be normalized.\r
-| Bit 31 of `zSig' must be zero, and `zExp' must be 1 less than the ``true''\r
-| floating-point exponent.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float32\r
- normalizeRoundAndPackFloat32( flag zSign, int16 zExp, bits32 zSig )\r
-{\r
-    int8 shiftCount;\r
-\r
-    shiftCount = countLeadingZeros32( zSig ) - 1;\r
-    return roundAndPackFloat32( zSign, zExp - shiftCount, zSig<<shiftCount );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the least-significant 32 fraction bits of the double-precision\r
-| floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE bits32 extractFloat64Frac1( float64 a )\r
-{\r
-\r
-    return a.low;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the most-significant 20 fraction bits of the double-precision\r
-| floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE bits32 extractFloat64Frac0( float64 a )\r
-{\r
-\r
-    return a.high & 0x000FFFFF;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the exponent bits of the double-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE int16 extractFloat64Exp( float64 a )\r
-{\r
-\r
-    return ( a.high>>20 ) & 0x7FF;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the sign bit of the double-precision floating-point value `a'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE flag extractFloat64Sign( float64 a )\r
-{\r
-\r
-    return a.high>>31;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Normalizes the subnormal double-precision floating-point value represented\r
-| by the denormalized significand formed by the concatenation of `aSig0' and\r
-| `aSig1'.  The normalized exponent is stored at the location pointed to by\r
-| `zExpPtr'.  The most significant 21 bits of the normalized significand are\r
-| stored at the location pointed to by `zSig0Ptr', and the least significant\r
-| 32 bits of the normalized significand are stored at the location pointed to\r
-| by `zSig1Ptr'.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static void\r
- normalizeFloat64Subnormal(\r
-     bits32 aSig0,\r
-     bits32 aSig1,\r
-     int16 *zExpPtr,\r
-     bits32 *zSig0Ptr,\r
-     bits32 *zSig1Ptr\r
- )\r
-{\r
-    int8 shiftCount;\r
-\r
-    if ( aSig0 == 0 ) {\r
-        shiftCount = countLeadingZeros32( aSig1 ) - 11;\r
-        if ( shiftCount < 0 ) {\r
-            *zSig0Ptr = aSig1>>( - shiftCount );\r
-            *zSig1Ptr = aSig1<<( shiftCount & 31 );\r
-        }\r
-        else {\r
-            *zSig0Ptr = aSig1<<shiftCount;\r
-            *zSig1Ptr = 0;\r
-        }\r
-        *zExpPtr = - shiftCount - 31;\r
-    }\r
-    else {\r
-        shiftCount = countLeadingZeros32( aSig0 ) - 11;\r
-        shortShift64Left( aSig0, aSig1, shiftCount, zSig0Ptr, zSig1Ptr );\r
-        *zExpPtr = 1 - shiftCount;\r
-    }\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Packs the sign `zSign', the exponent `zExp', and the significand formed by\r
-| the concatenation of `zSig0' and `zSig1' into a double-precision floating-\r
-| point value, returning the result.  After being shifted into the proper\r
-| positions, the three fields `zSign', `zExp', and `zSig0' are simply added\r
-| together to form the most significant 32 bits of the result.  This means\r
-| that any integer portion of `zSig0' will be added into the exponent.  Since\r
-| a properly normalized significand will have an integer portion equal to 1,\r
-| the `zExp' input should be 1 less than the desired result exponent whenever\r
-| `zSig0' and `zSig1' concatenated form a complete, normalized significand.\r
-*----------------------------------------------------------------------------*/\r
-\r
-INLINE float64\r
- packFloat64( flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 )\r
-{\r
-    float64 z;\r
-\r
-    z.low = zSig1;\r
-    z.high = ( ( (bits32) zSign )<<31 ) + ( ( (bits32) zExp )<<20 ) + zSig0;\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and extended significand formed by the concatenation of `zSig0', `zSig1',\r
-| and `zSig2', and returns the proper double-precision floating-point value\r
-| corresponding to the abstract input.  Ordinarily, the abstract value is\r
-| simply rounded and packed into the double-precision format, with the inexact\r
-| exception raised if the abstract input cannot be represented exactly.\r
-| However, if the abstract value is too large, the overflow and inexact\r
-| exceptions are raised and an infinity or maximal finite value is returned.\r
-| If the abstract value is too small, the input value is rounded to a\r
-| subnormal number, and the underflow and inexact exceptions are raised if the\r
-| abstract input cannot be represented exactly as a subnormal double-precision\r
-| floating-point number.\r
-|     The input significand must be normalized or smaller.  If the input\r
-| significand is not normalized, `zExp' must be 0; in that case, the result\r
-| returned is a subnormal number, and it must not require rounding.  In the\r
-| usual case that the input significand is normalized, `zExp' must be 1 less\r
-| than the ``true'' floating-point exponent.  The handling of underflow and\r
-| overflow follows the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float64\r
- roundAndPackFloat64(\r
-     flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1, bits32 zSig2 )\r
-{\r
-    int8 roundingMode;\r
-    flag roundNearestEven, increment, isTiny;\r
-\r
-    roundingMode = float_rounding_mode;\r
-    roundNearestEven = ( roundingMode == float_round_nearest_even );\r
-    increment = ( (sbits32) zSig2 < 0 );\r
-    if ( ! roundNearestEven ) {\r
-        if ( roundingMode == float_round_to_zero ) {\r
-            increment = 0;\r
-        }\r
-        else {\r
-            if ( zSign ) {\r
-                increment = ( roundingMode == float_round_down ) && zSig2;\r
-            }\r
-            else {\r
-                increment = ( roundingMode == float_round_up ) && zSig2;\r
-            }\r
-        }\r
-    }\r
-    if ( 0x7FD <= (bits16) zExp ) {\r
-        if (    ( 0x7FD < zExp )\r
-             || (    ( zExp == 0x7FD )\r
-                  && eq64( 0x001FFFFF, 0xFFFFFFFF, zSig0, zSig1 )\r
-                  && increment\r
-                )\r
-           ) {\r
-            float_raise( float_flag_overflow | float_flag_inexact );\r
-            if (    ( roundingMode == float_round_to_zero )\r
-                 || ( zSign && ( roundingMode == float_round_up ) )\r
-                 || ( ! zSign && ( roundingMode == float_round_down ) )\r
-               ) {\r
-                return packFloat64( zSign, 0x7FE, 0x000FFFFF, 0xFFFFFFFF );\r
-            }\r
-            return packFloat64( zSign, 0x7FF, 0, 0 );\r
-        }\r
-        if ( zExp < 0 ) {\r
-            isTiny =\r
-                   ( float_detect_tininess == float_tininess_before_rounding )\r
-                || ( zExp < -1 )\r
-                || ! increment\r
-                || lt64( zSig0, zSig1, 0x001FFFFF, 0xFFFFFFFF );\r
-            shift64ExtraRightJamming(\r
-                zSig0, zSig1, zSig2, - zExp, &zSig0, &zSig1, &zSig2 );\r
-            zExp = 0;\r
-            if ( isTiny && zSig2 ) float_raise( float_flag_underflow );\r
-            if ( roundNearestEven ) {\r
-                increment = ( (sbits32) zSig2 < 0 );\r
-            }\r
-            else {\r
-                if ( zSign ) {\r
-                    increment = ( roundingMode == float_round_down ) && zSig2;\r
-                }\r
-                else {\r
-                    increment = ( roundingMode == float_round_up ) && zSig2;\r
-                }\r
-            }\r
-        }\r
-    }\r
-    if ( zSig2 ) float_exception_flags |= float_flag_inexact;\r
-    if ( increment ) {\r
-        add64( zSig0, zSig1, 0, 1, &zSig0, &zSig1 );\r
-        zSig1 &= ~ ( ( zSig2 + zSig2 == 0 ) & roundNearestEven );\r
-    }\r
-    else {\r
-        if ( ( zSig0 | zSig1 ) == 0 ) zExp = 0;\r
-    }\r
-    return packFloat64( zSign, zExp, zSig0, zSig1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Takes an abstract floating-point value having sign `zSign', exponent `zExp',\r
-| and significand formed by the concatenation of `zSig0' and `zSig1', and\r
-| returns the proper double-precision floating-point value corresponding\r
-| to the abstract input.  This routine is just like `roundAndPackFloat64'\r
-| except that the input significand has fewer bits and does not have to be\r
-| normalized.  In all cases, `zExp' must be 1 less than the ``true'' floating-\r
-| point exponent.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float64\r
- normalizeRoundAndPackFloat64(\r
-     flag zSign, int16 zExp, bits32 zSig0, bits32 zSig1 )\r
-{\r
-    int8 shiftCount;\r
-    bits32 zSig2;\r
-\r
-    if ( zSig0 == 0 ) {\r
-        zSig0 = zSig1;\r
-        zSig1 = 0;\r
-        zExp -= 32;\r
-    }\r
-    shiftCount = countLeadingZeros32( zSig0 ) - 11;\r
-    if ( 0 <= shiftCount ) {\r
-        zSig2 = 0;\r
-        shortShift64Left( zSig0, zSig1, shiftCount, &zSig0, &zSig1 );\r
-    }\r
-    else {\r
-        shift64ExtraRightJamming(\r
-            zSig0, zSig1, 0, - shiftCount, &zSig0, &zSig1, &zSig2 );\r
-    }\r
-    zExp -= shiftCount;\r
-    return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the 32-bit two's complement integer `a' to\r
-| the single-precision floating-point format.  The conversion is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 int32_to_float32( int32 a )\r
-{\r
-    flag zSign;\r
-\r
-    if ( a == 0 ) return 0;\r
-    if ( a == (sbits32) 0x80000000 ) return packFloat32( 1, 0x9E, 0 );\r
-    zSign = ( a < 0 );\r
-    return normalizeRoundAndPackFloat32( zSign, 0x9C, zSign ? - a : a );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the 32-bit two's complement integer `a' to\r
-| the double-precision floating-point format.  The conversion is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 int32_to_float64( int32 a )\r
-{\r
-    flag zSign;\r
-    bits32 absA;\r
-    int8 shiftCount;\r
-    bits32 zSig0, zSig1;\r
-\r
-    if ( a == 0 ) return packFloat64( 0, 0, 0, 0 );\r
-    zSign = ( a < 0 );\r
-    absA = zSign ? - a : a;\r
-    shiftCount = countLeadingZeros32( absA ) - 11;\r
-    if ( 0 <= shiftCount ) {\r
-        zSig0 = absA<<shiftCount;\r
-        zSig1 = 0;\r
-    }\r
-    else {\r
-        shift64Right( absA, 0, - shiftCount, &zSig0, &zSig1 );\r
-    }\r
-    return packFloat64( zSign, 0x412 - shiftCount, zSig0, zSig1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the single-precision floating-point value\r
-| `a' to the 32-bit two's complement integer format.  The conversion is\r
-| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic---which means in particular that the conversion is rounded\r
-| according to the current rounding mode.  If `a' is a NaN, the largest\r
-| positive integer is returned.  Otherwise, if the conversion overflows, the\r
-| largest integer with the same sign as `a' is returned.\r
-*----------------------------------------------------------------------------*/\r
-\r
-int32 float32_to_int32( float32 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp, shiftCount;\r
-    bits32 aSig, aSigExtra;\r
-    int32 z;\r
-    int8 roundingMode;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    shiftCount = aExp - 0x96;\r
-    if ( 0 <= shiftCount ) {\r
-        if ( 0x9E <= aExp ) {\r
-            if ( a != 0xCF000000 ) {\r
-                float_raise( float_flag_invalid );\r
-                if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) {\r
-                    return 0x7FFFFFFF;\r
-                }\r
-            }\r
-            return (sbits32) 0x80000000;\r
-        }\r
-        z = ( aSig | 0x00800000 )<<shiftCount;\r
-        if ( aSign ) z = - z;\r
-    }\r
-    else {\r
-        if ( aExp < 0x7E ) {\r
-            aSigExtra = aExp | aSig;\r
-            z = 0;\r
-        }\r
-        else {\r
-            aSig |= 0x00800000;\r
-            aSigExtra = aSig<<( shiftCount & 31 );\r
-            z = aSig>>( - shiftCount );\r
-        }\r
-        if ( aSigExtra ) float_exception_flags |= float_flag_inexact;\r
-        roundingMode = float_rounding_mode;\r
-        if ( roundingMode == float_round_nearest_even ) {\r
-            if ( (sbits32) aSigExtra < 0 ) {\r
-                ++z;\r
-                if ( (bits32) ( aSigExtra<<1 ) == 0 ) z &= ~1;\r
-            }\r
-            if ( aSign ) z = - z;\r
-        }\r
-        else {\r
-            aSigExtra = ( aSigExtra != 0 );\r
-            if ( aSign ) {\r
-                z += ( roundingMode == float_round_down ) & aSigExtra;\r
-                z = - z;\r
-            }\r
-            else {\r
-                z += ( roundingMode == float_round_up ) & aSigExtra;\r
-            }\r
-        }\r
-    }\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the single-precision floating-point value\r
-| `a' to the 32-bit two's complement integer format.  The conversion is\r
-| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic, except that the conversion is always rounded toward zero.\r
-| If `a' is a NaN, the largest positive integer is returned.  Otherwise, if\r
-| the conversion overflows, the largest integer with the same sign as `a' is\r
-| returned.\r
-*----------------------------------------------------------------------------*/\r
-\r
-int32 float32_to_int32_round_to_zero( float32 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp, shiftCount;\r
-    bits32 aSig;\r
-    int32 z;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    shiftCount = aExp - 0x9E;\r
-    if ( 0 <= shiftCount ) {\r
-        if ( a != 0xCF000000 ) {\r
-            float_raise( float_flag_invalid );\r
-            if ( ! aSign || ( ( aExp == 0xFF ) && aSig ) ) return 0x7FFFFFFF;\r
-        }\r
-        return (sbits32) 0x80000000;\r
-    }\r
-    else if ( aExp <= 0x7E ) {\r
-        if ( aExp | aSig ) float_exception_flags |= float_flag_inexact;\r
-        return 0;\r
-    }\r
-    aSig = ( aSig | 0x00800000 )<<8;\r
-    z = aSig>>( - shiftCount );\r
-    if ( (bits32) ( aSig<<( shiftCount & 31 ) ) ) {\r
-        float_exception_flags |= float_flag_inexact;\r
-    }\r
-    if ( aSign ) z = - z;\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the single-precision floating-point value\r
-| `a' to the double-precision floating-point format.  The conversion is\r
-| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float32_to_float64( float32 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp;\r
-    bits32 aSig, zSig0, zSig1;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig ) return commonNaNToFloat64( float32ToCommonNaN( a ) );\r
-        return packFloat64( aSign, 0x7FF, 0, 0 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( aSig == 0 ) return packFloat64( aSign, 0, 0, 0 );\r
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
-        --aExp;\r
-    }\r
-    shift64Right( aSig, 0, 3, &zSig0, &zSig1 );\r
-    return packFloat64( aSign, aExp + 0x380, zSig0, zSig1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Rounds the single-precision floating-point value `a' to an integer,\r
-| and returns the result as a single-precision floating-point value.  The\r
-| operation is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_round_to_int( float32 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp;\r
-    bits32 lastBitMask, roundBitsMask;\r
-    int8 roundingMode;\r
-    float32 z;\r
-\r
-    aExp = extractFloat32Exp( a );\r
-    if ( 0x96 <= aExp ) {\r
-        if ( ( aExp == 0xFF ) && extractFloat32Frac( a ) ) {\r
-            return propagateFloat32NaN( a, a );\r
-        }\r
-        return a;\r
-    }\r
-    if ( aExp <= 0x7E ) {\r
-        if ( (bits32) ( a<<1 ) == 0 ) return a;\r
-        float_exception_flags |= float_flag_inexact;\r
-        aSign = extractFloat32Sign( a );\r
-        switch ( float_rounding_mode ) {\r
-         case float_round_nearest_even:\r
-            if ( ( aExp == 0x7E ) && extractFloat32Frac( a ) ) {\r
-                return packFloat32( aSign, 0x7F, 0 );\r
-            }\r
-            break;\r
-         case float_round_down:\r
-            return aSign ? 0xBF800000 : 0;\r
-         case float_round_up:\r
-            return aSign ? 0x80000000 : 0x3F800000;\r
-        }\r
-        return packFloat32( aSign, 0, 0 );\r
-    }\r
-    lastBitMask = 1;\r
-    lastBitMask <<= 0x96 - aExp;\r
-    roundBitsMask = lastBitMask - 1;\r
-    z = a;\r
-    roundingMode = float_rounding_mode;\r
-    if ( roundingMode == float_round_nearest_even ) {\r
-        z += lastBitMask>>1;\r
-        if ( ( z & roundBitsMask ) == 0 ) z &= ~ lastBitMask;\r
-    }\r
-    else if ( roundingMode != float_round_to_zero ) {\r
-        if ( extractFloat32Sign( z ) ^ ( roundingMode == float_round_up ) ) {\r
-            z += roundBitsMask;\r
-        }\r
-    }\r
-    z &= ~ roundBitsMask;\r
-    if ( z != a ) float_exception_flags |= float_flag_inexact;\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of adding the absolute values of the single-precision\r
-| floating-point values `a' and `b'.  If `zSign' is 1, the sum is negated\r
-| before being returned.  `zSign' is ignored if the result is a NaN.\r
-| The addition is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float32 addFloat32Sigs( float32 a, float32 b, flag zSign )\r
-{\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig, bSig, zSig;\r
-    int16 expDiff;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    bSig = extractFloat32Frac( b );\r
-    bExp = extractFloat32Exp( b );\r
-    expDiff = aExp - bExp;\r
-    aSig <<= 6;\r
-    bSig <<= 6;\r
-    if ( 0 < expDiff ) {\r
-        if ( aExp == 0xFF ) {\r
-            if ( aSig ) return propagateFloat32NaN( a, b );\r
-            return a;\r
-        }\r
-        if ( bExp == 0 ) {\r
-            --expDiff;\r
-        }\r
-        else {\r
-            bSig |= 0x20000000;\r
-        }\r
-        shift32RightJamming( bSig, expDiff, &bSig );\r
-        zExp = aExp;\r
-    }\r
-    else if ( expDiff < 0 ) {\r
-        if ( bExp == 0xFF ) {\r
-            if ( bSig ) return propagateFloat32NaN( a, b );\r
-            return packFloat32( zSign, 0xFF, 0 );\r
-        }\r
-        if ( aExp == 0 ) {\r
-            ++expDiff;\r
-        }\r
-        else {\r
-            aSig |= 0x20000000;\r
-        }\r
-        shift32RightJamming( aSig, - expDiff, &aSig );\r
-        zExp = bExp;\r
-    }\r
-    else {\r
-        if ( aExp == 0xFF ) {\r
-            if ( aSig | bSig ) return propagateFloat32NaN( a, b );\r
-            return a;\r
-        }\r
-        if ( aExp == 0 ) return packFloat32( zSign, 0, ( aSig + bSig )>>6 );\r
-        zSig = 0x40000000 + aSig + bSig;\r
-        zExp = aExp;\r
-        goto roundAndPack;\r
-    }\r
-    aSig |= 0x20000000;\r
-    zSig = ( aSig + bSig )<<1;\r
-    --zExp;\r
-    if ( (sbits32) zSig < 0 ) {\r
-        zSig = aSig + bSig;\r
-        ++zExp;\r
-    }\r
- roundAndPack:\r
-    return roundAndPackFloat32( zSign, zExp, zSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of subtracting the absolute values of the single-\r
-| precision floating-point values `a' and `b'.  If `zSign' is 1, the\r
-| difference is negated before being returned.  `zSign' is ignored if the\r
-| result is a NaN.  The subtraction is performed according to the IEC/IEEE\r
-| Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float32 subFloat32Sigs( float32 a, float32 b, flag zSign )\r
-{\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig, bSig, zSig;\r
-    int16 expDiff;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    bSig = extractFloat32Frac( b );\r
-    bExp = extractFloat32Exp( b );\r
-    expDiff = aExp - bExp;\r
-    aSig <<= 7;\r
-    bSig <<= 7;\r
-    if ( 0 < expDiff ) goto aExpBigger;\r
-    if ( expDiff < 0 ) goto bExpBigger;\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig | bSig ) return propagateFloat32NaN( a, b );\r
-        float_raise( float_flag_invalid );\r
-        return float32_default_nan;\r
-    }\r
-    if ( aExp == 0 ) {\r
-        aExp = 1;\r
-        bExp = 1;\r
-    }\r
-    if ( bSig < aSig ) goto aBigger;\r
-    if ( aSig < bSig ) goto bBigger;\r
-    return packFloat32( float_rounding_mode == float_round_down, 0, 0 );\r
- bExpBigger:\r
-    if ( bExp == 0xFF ) {\r
-        if ( bSig ) return propagateFloat32NaN( a, b );\r
-        return packFloat32( zSign ^ 1, 0xFF, 0 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        ++expDiff;\r
-    }\r
-    else {\r
-        aSig |= 0x40000000;\r
-    }\r
-    shift32RightJamming( aSig, - expDiff, &aSig );\r
-    bSig |= 0x40000000;\r
- bBigger:\r
-    zSig = bSig - aSig;\r
-    zExp = bExp;\r
-    zSign ^= 1;\r
-    goto normalizeRoundAndPack;\r
- aExpBigger:\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig ) return propagateFloat32NaN( a, b );\r
-        return a;\r
-    }\r
-    if ( bExp == 0 ) {\r
-        --expDiff;\r
-    }\r
-    else {\r
-        bSig |= 0x40000000;\r
-    }\r
-    shift32RightJamming( bSig, expDiff, &bSig );\r
-    aSig |= 0x40000000;\r
- aBigger:\r
-    zSig = aSig - bSig;\r
-    zExp = aExp;\r
- normalizeRoundAndPack:\r
-    --zExp;\r
-    return normalizeRoundAndPackFloat32( zSign, zExp, zSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of adding the single-precision floating-point values `a'\r
-| and `b'.  The operation is performed according to the IEC/IEEE Standard for\r
-| Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_add( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    aSign = extractFloat32Sign( a );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aSign == bSign ) {\r
-        return addFloat32Sigs( a, b, aSign );\r
-    }\r
-    else {\r
-        return subFloat32Sigs( a, b, aSign );\r
-    }\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of subtracting the single-precision floating-point values\r
-| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard\r
-| for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_sub( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    aSign = extractFloat32Sign( a );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aSign == bSign ) {\r
-        return subFloat32Sigs( a, b, aSign );\r
-    }\r
-    else {\r
-        return addFloat32Sigs( a, b, aSign );\r
-    }\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of multiplying the single-precision floating-point values\r
-| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard\r
-| for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_mul( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign, zSign;\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig, bSig, zSig0, zSig1;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    bSig = extractFloat32Frac( b );\r
-    bExp = extractFloat32Exp( b );\r
-    bSign = extractFloat32Sign( b );\r
-    zSign = aSign ^ bSign;\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {\r
-            return propagateFloat32NaN( a, b );\r
-        }\r
-        if ( ( bExp | bSig ) == 0 ) {\r
-            float_raise( float_flag_invalid );\r
-            return float32_default_nan;\r
-        }\r
-        return packFloat32( zSign, 0xFF, 0 );\r
-    }\r
-    if ( bExp == 0xFF ) {\r
-        if ( bSig ) return propagateFloat32NaN( a, b );\r
-        if ( ( aExp | aSig ) == 0 ) {\r
-            float_raise( float_flag_invalid );\r
-            return float32_default_nan;\r
-        }\r
-        return packFloat32( zSign, 0xFF, 0 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );\r
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
-    }\r
-    if ( bExp == 0 ) {\r
-        if ( bSig == 0 ) return packFloat32( zSign, 0, 0 );\r
-        normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
-    }\r
-    zExp = aExp + bExp - 0x7F;\r
-    aSig = ( aSig | 0x00800000 )<<7;\r
-    bSig = ( bSig | 0x00800000 )<<8;\r
-    mul32To64( aSig, bSig, &zSig0, &zSig1 );\r
-    zSig0 |= ( zSig1 != 0 );\r
-    if ( 0 <= (sbits32) ( zSig0<<1 ) ) {\r
-        zSig0 <<= 1;\r
-        --zExp;\r
-    }\r
-    return roundAndPackFloat32( zSign, zExp, zSig0 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of dividing the single-precision floating-point value `a'\r
-| by the corresponding value `b'.  The operation is performed according to the\r
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_div( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign, zSign;\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig, bSig, zSig, rem0, rem1, term0, term1;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    bSig = extractFloat32Frac( b );\r
-    bExp = extractFloat32Exp( b );\r
-    bSign = extractFloat32Sign( b );\r
-    zSign = aSign ^ bSign;\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig ) return propagateFloat32NaN( a, b );\r
-        if ( bExp == 0xFF ) {\r
-            if ( bSig ) return propagateFloat32NaN( a, b );\r
-            float_raise( float_flag_invalid );\r
-            return float32_default_nan;\r
-        }\r
-        return packFloat32( zSign, 0xFF, 0 );\r
-    }\r
-    if ( bExp == 0xFF ) {\r
-        if ( bSig ) return propagateFloat32NaN( a, b );\r
-        return packFloat32( zSign, 0, 0 );\r
-    }\r
-    if ( bExp == 0 ) {\r
-        if ( bSig == 0 ) {\r
-            if ( ( aExp | aSig ) == 0 ) {\r
-                float_raise( float_flag_invalid );\r
-                return float32_default_nan;\r
-            }\r
-            float_raise( float_flag_divbyzero );\r
-            return packFloat32( zSign, 0xFF, 0 );\r
-        }\r
-        normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( aSig == 0 ) return packFloat32( zSign, 0, 0 );\r
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
-    }\r
-    zExp = aExp - bExp + 0x7D;\r
-    aSig = ( aSig | 0x00800000 )<<7;\r
-    bSig = ( bSig | 0x00800000 )<<8;\r
-    if ( bSig <= ( aSig + aSig ) ) {\r
-        aSig >>= 1;\r
-        ++zExp;\r
-    }\r
-    zSig = estimateDiv64To32( aSig, 0, bSig );\r
-    if ( ( zSig & 0x3F ) <= 2 ) {\r
-        mul32To64( bSig, zSig, &term0, &term1 );\r
-        sub64( aSig, 0, term0, term1, &rem0, &rem1 );\r
-        while ( (sbits32) rem0 < 0 ) {\r
-            --zSig;\r
-            add64( rem0, rem1, 0, bSig, &rem0, &rem1 );\r
-        }\r
-        zSig |= ( rem1 != 0 );\r
-    }\r
-    return roundAndPackFloat32( zSign, zExp, zSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the remainder of the single-precision floating-point value `a'\r
-| with respect to the corresponding value `b'.  The operation is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_rem( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign, zSign;\r
-    int16 aExp, bExp, expDiff;\r
-    bits32 aSig, bSig, q, alternateASig;\r
-    sbits32 sigMean;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    bSig = extractFloat32Frac( b );\r
-    bExp = extractFloat32Exp( b );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig || ( ( bExp == 0xFF ) && bSig ) ) {\r
-            return propagateFloat32NaN( a, b );\r
-        }\r
-        float_raise( float_flag_invalid );\r
-        return float32_default_nan;\r
-    }\r
-    if ( bExp == 0xFF ) {\r
-        if ( bSig ) return propagateFloat32NaN( a, b );\r
-        return a;\r
-    }\r
-    if ( bExp == 0 ) {\r
-        if ( bSig == 0 ) {\r
-            float_raise( float_flag_invalid );\r
-            return float32_default_nan;\r
-        }\r
-        normalizeFloat32Subnormal( bSig, &bExp, &bSig );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( aSig == 0 ) return a;\r
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
-    }\r
-    expDiff = aExp - bExp;\r
-    aSig = ( aSig | 0x00800000 )<<8;\r
-    bSig = ( bSig | 0x00800000 )<<8;\r
-    if ( expDiff < 0 ) {\r
-        if ( expDiff < -1 ) return a;\r
-        aSig >>= 1;\r
-    }\r
-    q = ( bSig <= aSig );\r
-    if ( q ) aSig -= bSig;\r
-    expDiff -= 32;\r
-    while ( 0 < expDiff ) {\r
-        q = estimateDiv64To32( aSig, 0, bSig );\r
-        q = ( 2 < q ) ? q - 2 : 0;\r
-        aSig = - ( ( bSig>>2 ) * q );\r
-        expDiff -= 30;\r
-    }\r
-    expDiff += 32;\r
-    if ( 0 < expDiff ) {\r
-        q = estimateDiv64To32( aSig, 0, bSig );\r
-        q = ( 2 < q ) ? q - 2 : 0;\r
-        q >>= 32 - expDiff;\r
-        bSig >>= 2;\r
-        aSig = ( ( aSig>>1 )<<( expDiff - 1 ) ) - bSig * q;\r
-    }\r
-    else {\r
-        aSig >>= 2;\r
-        bSig >>= 2;\r
-    }\r
-    do {\r
-        alternateASig = aSig;\r
-        ++q;\r
-        aSig -= bSig;\r
-    } while ( 0 <= (sbits32) aSig );\r
-    sigMean = aSig + alternateASig;\r
-    if ( ( sigMean < 0 ) || ( ( sigMean == 0 ) && ( q & 1 ) ) ) {\r
-        aSig = alternateASig;\r
-    }\r
-    zSign = ( (sbits32) aSig < 0 );\r
-    if ( zSign ) aSig = - aSig;\r
-    return normalizeRoundAndPackFloat32( aSign ^ zSign, bExp, aSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the square root of the single-precision floating-point value `a'.\r
-| The operation is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float32_sqrt( float32 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp, zExp;\r
-    bits32 aSig, zSig, rem0, rem1, term0, term1;\r
-\r
-    aSig = extractFloat32Frac( a );\r
-    aExp = extractFloat32Exp( a );\r
-    aSign = extractFloat32Sign( a );\r
-    if ( aExp == 0xFF ) {\r
-        if ( aSig ) return propagateFloat32NaN( a, 0 );\r
-        if ( ! aSign ) return a;\r
-        float_raise( float_flag_invalid );\r
-        return float32_default_nan;\r
-    }\r
-    if ( aSign ) {\r
-        if ( ( aExp | aSig ) == 0 ) return a;\r
-        float_raise( float_flag_invalid );\r
-        return float32_default_nan;\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( aSig == 0 ) return 0;\r
-        normalizeFloat32Subnormal( aSig, &aExp, &aSig );\r
-    }\r
-    zExp = ( ( aExp - 0x7F )>>1 ) + 0x7E;\r
-    aSig = ( aSig | 0x00800000 )<<8;\r
-    zSig = estimateSqrt32( aExp, aSig ) + 2;\r
-    if ( ( zSig & 0x7F ) <= 5 ) {\r
-        if ( zSig < 2 ) {\r
-            zSig = 0x7FFFFFFF;\r
-            goto roundAndPack;\r
-        }\r
-        else {\r
-            aSig >>= aExp & 1;\r
-            mul32To64( zSig, zSig, &term0, &term1 );\r
-            sub64( aSig, 0, term0, term1, &rem0, &rem1 );\r
-            while ( (sbits32) rem0 < 0 ) {\r
-                --zSig;\r
-                shortShift64Left( 0, zSig, 1, &term0, &term1 );\r
-                term1 |= 1;\r
-                add64( rem0, rem1, term0, term1, &rem0, &rem1 );\r
-            }\r
-            zSig |= ( ( rem0 | rem1 ) != 0 );\r
-        }\r
-    }\r
-    shift32RightJamming( zSig, 1, &zSig );\r
- roundAndPack:\r
-    return roundAndPackFloat32( 0, zExp, zSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is equal to\r
-| the corresponding value `b', and 0 otherwise.  The comparison is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float32_eq( float32 a, float32 b )\r
-{\r
-\r
-    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
-         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
-       ) {\r
-        if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
-            float_raise( float_flag_invalid );\r
-        }\r
-        return 0;\r
-    }\r
-    return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is less than\r
-| or equal to the corresponding value `b', and 0 otherwise.  The comparison\r
-| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float32_le( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
-         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
-       ) {\r
-        float_raise( float_flag_invalid );\r
-        return 0;\r
-    }\r
-    aSign = extractFloat32Sign( a );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
-    return ( a == b ) || ( aSign ^ ( a < b ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is less than\r
-| the corresponding value `b', and 0 otherwise.  The comparison is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float32_lt( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
-         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
-       ) {\r
-        float_raise( float_flag_invalid );\r
-        return 0;\r
-    }\r
-    aSign = extractFloat32Sign( a );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );\r
-    return ( a != b ) && ( aSign ^ ( a < b ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is equal to\r
-| the corresponding value `b', and 0 otherwise.  The invalid exception is\r
-| raised if either operand is a NaN.  Otherwise, the comparison is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float32_eq_signaling( float32 a, float32 b )\r
-{\r
-\r
-    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
-         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
-       ) {\r
-        float_raise( float_flag_invalid );\r
-        return 0;\r
-    }\r
-    return ( a == b ) || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is less than or\r
-| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not\r
-| cause an exception.  Otherwise, the comparison is performed according to the\r
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float32_le_quiet( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
-         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
-       ) {\r
-        if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
-            float_raise( float_flag_invalid );\r
-        }\r
-        return 0;\r
-    }\r
-    aSign = extractFloat32Sign( a );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aSign != bSign ) return aSign || ( (bits32) ( ( a | b )<<1 ) == 0 );\r
-    return ( a == b ) || ( aSign ^ ( a < b ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the single-precision floating-point value `a' is less than\r
-| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an\r
-| exception.  Otherwise, the comparison is performed according to the IEC/IEEE\r
-| Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float32_lt_quiet( float32 a, float32 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    ( ( extractFloat32Exp( a ) == 0xFF ) && extractFloat32Frac( a ) )\r
-         || ( ( extractFloat32Exp( b ) == 0xFF ) && extractFloat32Frac( b ) )\r
-       ) {\r
-        if ( float32_is_signaling_nan( a ) || float32_is_signaling_nan( b ) ) {\r
-            float_raise( float_flag_invalid );\r
-        }\r
-        return 0;\r
-    }\r
-    aSign = extractFloat32Sign( a );\r
-    bSign = extractFloat32Sign( b );\r
-    if ( aSign != bSign ) return aSign && ( (bits32) ( ( a | b )<<1 ) != 0 );\r
-    return ( a != b ) && ( aSign ^ ( a < b ) );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the double-precision floating-point value\r
-| `a' to the 32-bit two's complement integer format.  The conversion is\r
-| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic---which means in particular that the conversion is rounded\r
-| according to the current rounding mode.  If `a' is a NaN, the largest\r
-| positive integer is returned.  Otherwise, if the conversion overflows, the\r
-| largest integer with the same sign as `a' is returned.\r
-*----------------------------------------------------------------------------*/\r
-\r
-int32 float64_to_int32( float64 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp, shiftCount;\r
-    bits32 aSig0, aSig1, absZ, aSigExtra;\r
-    int32 z;\r
-    int8 roundingMode;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    shiftCount = aExp - 0x413;\r
-    if ( 0 <= shiftCount ) {\r
-        if ( 0x41E < aExp ) {\r
-            if ( ( aExp == 0x7FF ) && ( aSig0 | aSig1 ) ) aSign = 0;\r
-            goto invalid;\r
-        }\r
-        shortShift64Left(\r
-            aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );\r
-        if ( 0x80000000 < absZ ) goto invalid;\r
-    }\r
-    else {\r
-        aSig1 = ( aSig1 != 0 );\r
-        if ( aExp < 0x3FE ) {\r
-            aSigExtra = aExp | aSig0 | aSig1;\r
-            absZ = 0;\r
-        }\r
-        else {\r
-            aSig0 |= 0x00100000;\r
-            aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;\r
-            absZ = aSig0>>( - shiftCount );\r
-        }\r
-    }\r
-    roundingMode = float_rounding_mode;\r
-    if ( roundingMode == float_round_nearest_even ) {\r
-        if ( (sbits32) aSigExtra < 0 ) {\r
-            ++absZ;\r
-            if ( (bits32) ( aSigExtra<<1 ) == 0 ) absZ &= ~1;\r
-        }\r
-        z = aSign ? - absZ : absZ;\r
-    }\r
-    else {\r
-        aSigExtra = ( aSigExtra != 0 );\r
-        if ( aSign ) {\r
-            z = - (   absZ\r
-                    + ( ( roundingMode == float_round_down ) & aSigExtra ) );\r
-        }\r
-        else {\r
-            z = absZ + ( ( roundingMode == float_round_up ) & aSigExtra );\r
-        }\r
-    }\r
-    if ( ( aSign ^ ( z < 0 ) ) && z ) {\r
- invalid:\r
-        float_raise( float_flag_invalid );\r
-        return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
-    }\r
-    if ( aSigExtra ) float_exception_flags |= float_flag_inexact;\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the double-precision floating-point value\r
-| `a' to the 32-bit two's complement integer format.  The conversion is\r
-| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic, except that the conversion is always rounded toward zero.\r
-| If `a' is a NaN, the largest positive integer is returned.  Otherwise, if\r
-| the conversion overflows, the largest integer with the same sign as `a' is\r
-| returned.\r
-*----------------------------------------------------------------------------*/\r
-\r
-int32 float64_to_int32_round_to_zero( float64 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp, shiftCount;\r
-    bits32 aSig0, aSig1, absZ, aSigExtra;\r
-    int32 z;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    shiftCount = aExp - 0x413;\r
-    if ( 0 <= shiftCount ) {\r
-        if ( 0x41E < aExp ) {\r
-            if ( ( aExp == 0x7FF ) && ( aSig0 | aSig1 ) ) aSign = 0;\r
-            goto invalid;\r
-        }\r
-        shortShift64Left(\r
-            aSig0 | 0x00100000, aSig1, shiftCount, &absZ, &aSigExtra );\r
-    }\r
-    else {\r
-        if ( aExp < 0x3FF ) {\r
-            if ( aExp | aSig0 | aSig1 ) {\r
-                float_exception_flags |= float_flag_inexact;\r
-            }\r
-            return 0;\r
-        }\r
-        aSig0 |= 0x00100000;\r
-        aSigExtra = ( aSig0<<( shiftCount & 31 ) ) | aSig1;\r
-        absZ = aSig0>>( - shiftCount );\r
-    }\r
-    z = aSign ? - absZ : absZ;\r
-    if ( ( aSign ^ ( z < 0 ) ) && z ) {\r
- invalid:\r
-        float_raise( float_flag_invalid );\r
-        return aSign ? (sbits32) 0x80000000 : 0x7FFFFFFF;\r
-    }\r
-    if ( aSigExtra ) float_exception_flags |= float_flag_inexact;\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of converting the double-precision floating-point value\r
-| `a' to the single-precision floating-point format.  The conversion is\r
-| performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float32 float64_to_float32( float64 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp;\r
-    bits32 aSig0, aSig1, zSig;\r
-    bits32 allZero;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    if ( aExp == 0x7FF ) {\r
-        if ( aSig0 | aSig1 ) {\r
-            return commonNaNToFloat32( float64ToCommonNaN( a ) );\r
-        }\r
-        return packFloat32( aSign, 0xFF, 0 );\r
-    }\r
-    shift64RightJamming( aSig0, aSig1, 22, &allZero, &zSig );\r
-    if ( aExp ) zSig |= 0x40000000;\r
-    return roundAndPackFloat32( aSign, aExp - 0x381, zSig );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Rounds the double-precision floating-point value `a' to an integer,\r
-| and returns the result as a double-precision floating-point value.  The\r
-| operation is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_round_to_int( float64 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp;\r
-    bits32 lastBitMask, roundBitsMask;\r
-    int8 roundingMode;\r
-    float64 z;\r
-\r
-    aExp = extractFloat64Exp( a );\r
-    if ( 0x413 <= aExp ) {\r
-        if ( 0x433 <= aExp ) {\r
-            if (    ( aExp == 0x7FF )\r
-                 && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) ) {\r
-                return propagateFloat64NaN( a, a );\r
-            }\r
-            return a;\r
-        }\r
-        lastBitMask = 1;\r
-        lastBitMask = ( lastBitMask<<( 0x432 - aExp ) )<<1;\r
-        roundBitsMask = lastBitMask - 1;\r
-        z = a;\r
-        roundingMode = float_rounding_mode;\r
-        if ( roundingMode == float_round_nearest_even ) {\r
-            if ( lastBitMask ) {\r
-                add64( z.high, z.low, 0, lastBitMask>>1, &z.high, &z.low );\r
-                if ( ( z.low & roundBitsMask ) == 0 ) z.low &= ~ lastBitMask;\r
-            }\r
-            else {\r
-                if ( (sbits32) z.low < 0 ) {\r
-                    ++z.high;\r
-                    if ( (bits32) ( z.low<<1 ) == 0 ) z.high &= ~1;\r
-                }\r
-            }\r
-        }\r
-        else if ( roundingMode != float_round_to_zero ) {\r
-            if (   extractFloat64Sign( z )\r
-                 ^ ( roundingMode == float_round_up ) ) {\r
-                add64( z.high, z.low, 0, roundBitsMask, &z.high, &z.low );\r
-            }\r
-        }\r
-        z.low &= ~ roundBitsMask;\r
-    }\r
-    else {\r
-        if ( aExp <= 0x3FE ) {\r
-            if ( ( ( (bits32) ( a.high<<1 ) ) | a.low ) == 0 ) return a;\r
-            float_exception_flags |= float_flag_inexact;\r
-            aSign = extractFloat64Sign( a );\r
-            switch ( float_rounding_mode ) {\r
-             case float_round_nearest_even:\r
-                if (    ( aExp == 0x3FE )\r
-                     && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) )\r
-                   ) {\r
-                    return packFloat64( aSign, 0x3FF, 0, 0 );\r
-                }\r
-                break;\r
-             case float_round_down:\r
-                return\r
-                      aSign ? packFloat64( 1, 0x3FF, 0, 0 )\r
-                    : packFloat64( 0, 0, 0, 0 );\r
-             case float_round_up:\r
-                return\r
-                      aSign ? packFloat64( 1, 0, 0, 0 )\r
-                    : packFloat64( 0, 0x3FF, 0, 0 );\r
-            }\r
-            return packFloat64( aSign, 0, 0, 0 );\r
-        }\r
-        lastBitMask = 1;\r
-        lastBitMask <<= 0x413 - aExp;\r
-        roundBitsMask = lastBitMask - 1;\r
-        z.low = 0;\r
-        z.high = a.high;\r
-        roundingMode = float_rounding_mode;\r
-        if ( roundingMode == float_round_nearest_even ) {\r
-            z.high += lastBitMask>>1;\r
-            if ( ( ( z.high & roundBitsMask ) | a.low ) == 0 ) {\r
-                z.high &= ~ lastBitMask;\r
-            }\r
-        }\r
-        else if ( roundingMode != float_round_to_zero ) {\r
-            if (   extractFloat64Sign( z )\r
-                 ^ ( roundingMode == float_round_up ) ) {\r
-                z.high |= ( a.low != 0 );\r
-                z.high += roundBitsMask;\r
-            }\r
-        }\r
-        z.high &= ~ roundBitsMask;\r
-    }\r
-    if ( ( z.low != a.low ) || ( z.high != a.high ) ) {\r
-        float_exception_flags |= float_flag_inexact;\r
-    }\r
-    return z;\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of adding the absolute values of the double-precision\r
-| floating-point values `a' and `b'.  If `zSign' is 1, the sum is negated\r
-| before being returned.  `zSign' is ignored if the result is a NaN.\r
-| The addition is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float64 addFloat64Sigs( float64 a, float64 b, flag zSign )\r
-{\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;\r
-    int16 expDiff;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    bSig1 = extractFloat64Frac1( b );\r
-    bSig0 = extractFloat64Frac0( b );\r
-    bExp = extractFloat64Exp( b );\r
-    expDiff = aExp - bExp;\r
-    if ( 0 < expDiff ) {\r
-        if ( aExp == 0x7FF ) {\r
-            if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );\r
-            return a;\r
-        }\r
-        if ( bExp == 0 ) {\r
-            --expDiff;\r
-        }\r
-        else {\r
-            bSig0 |= 0x00100000;\r
-        }\r
-        shift64ExtraRightJamming(\r
-            bSig0, bSig1, 0, expDiff, &bSig0, &bSig1, &zSig2 );\r
-        zExp = aExp;\r
-    }\r
-    else if ( expDiff < 0 ) {\r
-        if ( bExp == 0x7FF ) {\r
-            if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
-            return packFloat64( zSign, 0x7FF, 0, 0 );\r
-        }\r
-        if ( aExp == 0 ) {\r
-            ++expDiff;\r
-        }\r
-        else {\r
-            aSig0 |= 0x00100000;\r
-        }\r
-        shift64ExtraRightJamming(\r
-            aSig0, aSig1, 0, - expDiff, &aSig0, &aSig1, &zSig2 );\r
-        zExp = bExp;\r
-    }\r
-    else {\r
-        if ( aExp == 0x7FF ) {\r
-            if ( aSig0 | aSig1 | bSig0 | bSig1 ) {\r
-                return propagateFloat64NaN( a, b );\r
-            }\r
-            return a;\r
-        }\r
-        add64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
-        if ( aExp == 0 ) return packFloat64( zSign, 0, zSig0, zSig1 );\r
-        zSig2 = 0;\r
-        zSig0 |= 0x00200000;\r
-        zExp = aExp;\r
-        goto shiftRight1;\r
-    }\r
-    aSig0 |= 0x00100000;\r
-    add64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
-    --zExp;\r
-    if ( zSig0 < 0x00200000 ) goto roundAndPack;\r
-    ++zExp;\r
- shiftRight1:\r
-    shift64ExtraRightJamming( zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );\r
- roundAndPack:\r
-    return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of subtracting the absolute values of the double-\r
-| precision floating-point values `a' and `b'.  If `zSign' is 1, the\r
-| difference is negated before being returned.  `zSign' is ignored if the\r
-| result is a NaN.  The subtraction is performed according to the IEC/IEEE\r
-| Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-static float64 subFloat64Sigs( float64 a, float64 b, flag zSign )\r
-{\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1;\r
-    int16 expDiff;\r
-    float64 z;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    bSig1 = extractFloat64Frac1( b );\r
-    bSig0 = extractFloat64Frac0( b );\r
-    bExp = extractFloat64Exp( b );\r
-    expDiff = aExp - bExp;\r
-    shortShift64Left( aSig0, aSig1, 10, &aSig0, &aSig1 );\r
-    shortShift64Left( bSig0, bSig1, 10, &bSig0, &bSig1 );\r
-    if ( 0 < expDiff ) goto aExpBigger;\r
-    if ( expDiff < 0 ) goto bExpBigger;\r
-    if ( aExp == 0x7FF ) {\r
-        if ( aSig0 | aSig1 | bSig0 | bSig1 ) {\r
-            return propagateFloat64NaN( a, b );\r
-        }\r
-        float_raise( float_flag_invalid );\r
-        z.low = float64_default_nan_low;\r
-        z.high = float64_default_nan_high;\r
-        return z;\r
-    }\r
-    if ( aExp == 0 ) {\r
-        aExp = 1;\r
-        bExp = 1;\r
-    }\r
-    if ( bSig0 < aSig0 ) goto aBigger;\r
-    if ( aSig0 < bSig0 ) goto bBigger;\r
-    if ( bSig1 < aSig1 ) goto aBigger;\r
-    if ( aSig1 < bSig1 ) goto bBigger;\r
-    return packFloat64( float_rounding_mode == float_round_down, 0, 0, 0 );\r
- bExpBigger:\r
-    if ( bExp == 0x7FF ) {\r
-        if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
-        return packFloat64( zSign ^ 1, 0x7FF, 0, 0 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        ++expDiff;\r
-    }\r
-    else {\r
-        aSig0 |= 0x40000000;\r
-    }\r
-    shift64RightJamming( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );\r
-    bSig0 |= 0x40000000;\r
- bBigger:\r
-    sub64( bSig0, bSig1, aSig0, aSig1, &zSig0, &zSig1 );\r
-    zExp = bExp;\r
-    zSign ^= 1;\r
-    goto normalizeRoundAndPack;\r
- aExpBigger:\r
-    if ( aExp == 0x7FF ) {\r
-        if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );\r
-        return a;\r
-    }\r
-    if ( bExp == 0 ) {\r
-        --expDiff;\r
-    }\r
-    else {\r
-        bSig0 |= 0x40000000;\r
-    }\r
-    shift64RightJamming( bSig0, bSig1, expDiff, &bSig0, &bSig1 );\r
-    aSig0 |= 0x40000000;\r
- aBigger:\r
-    sub64( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1 );\r
-    zExp = aExp;\r
- normalizeRoundAndPack:\r
-    --zExp;\r
-    return normalizeRoundAndPackFloat64( zSign, zExp - 10, zSig0, zSig1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of adding the double-precision floating-point values `a'\r
-| and `b'.  The operation is performed according to the IEC/IEEE Standard for\r
-| Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_add( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    aSign = extractFloat64Sign( a );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aSign == bSign ) {\r
-        return addFloat64Sigs( a, b, aSign );\r
-    }\r
-    else {\r
-        return subFloat64Sigs( a, b, aSign );\r
-    }\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of subtracting the double-precision floating-point values\r
-| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard\r
-| for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_sub( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    aSign = extractFloat64Sign( a );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aSign == bSign ) {\r
-        return subFloat64Sigs( a, b, aSign );\r
-    }\r
-    else {\r
-        return addFloat64Sigs( a, b, aSign );\r
-    }\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of multiplying the double-precision floating-point values\r
-| `a' and `b'.  The operation is performed according to the IEC/IEEE Standard\r
-| for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_mul( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign, zSign;\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2, zSig3;\r
-    float64 z;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    bSig1 = extractFloat64Frac1( b );\r
-    bSig0 = extractFloat64Frac0( b );\r
-    bExp = extractFloat64Exp( b );\r
-    bSign = extractFloat64Sign( b );\r
-    zSign = aSign ^ bSign;\r
-    if ( aExp == 0x7FF ) {\r
-        if (    ( aSig0 | aSig1 )\r
-             || ( ( bExp == 0x7FF ) && ( bSig0 | bSig1 ) ) ) {\r
-            return propagateFloat64NaN( a, b );\r
-        }\r
-        if ( ( bExp | bSig0 | bSig1 ) == 0 ) goto invalid;\r
-        return packFloat64( zSign, 0x7FF, 0, 0 );\r
-    }\r
-    if ( bExp == 0x7FF ) {\r
-        if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
-        if ( ( aExp | aSig0 | aSig1 ) == 0 ) {\r
- invalid:\r
-            float_raise( float_flag_invalid );\r
-            z.low = float64_default_nan_low;\r
-            z.high = float64_default_nan_high;\r
-            return z;\r
-        }\r
-        return packFloat64( zSign, 0x7FF, 0, 0 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );\r
-        normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
-    }\r
-    if ( bExp == 0 ) {\r
-        if ( ( bSig0 | bSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );\r
-        normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
-    }\r
-    zExp = aExp + bExp - 0x400;\r
-    aSig0 |= 0x00100000;\r
-    shortShift64Left( bSig0, bSig1, 12, &bSig0, &bSig1 );\r
-    mul64To128( aSig0, aSig1, bSig0, bSig1, &zSig0, &zSig1, &zSig2, &zSig3 );\r
-    add64( zSig0, zSig1, aSig0, aSig1, &zSig0, &zSig1 );\r
-    zSig2 |= ( zSig3 != 0 );\r
-    if ( 0x00200000 <= zSig0 ) {\r
-        shift64ExtraRightJamming(\r
-            zSig0, zSig1, zSig2, 1, &zSig0, &zSig1, &zSig2 );\r
-        ++zExp;\r
-    }\r
-    return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the result of dividing the double-precision floating-point value `a'\r
-| by the corresponding value `b'.  The operation is performed according to the\r
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_div( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign, zSign;\r
-    int16 aExp, bExp, zExp;\r
-    bits32 aSig0, aSig1, bSig0, bSig1, zSig0, zSig1, zSig2;\r
-    bits32 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
-    float64 z;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    bSig1 = extractFloat64Frac1( b );\r
-    bSig0 = extractFloat64Frac0( b );\r
-    bExp = extractFloat64Exp( b );\r
-    bSign = extractFloat64Sign( b );\r
-    zSign = aSign ^ bSign;\r
-    if ( aExp == 0x7FF ) {\r
-        if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, b );\r
-        if ( bExp == 0x7FF ) {\r
-            if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
-            goto invalid;\r
-        }\r
-        return packFloat64( zSign, 0x7FF, 0, 0 );\r
-    }\r
-    if ( bExp == 0x7FF ) {\r
-        if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
-        return packFloat64( zSign, 0, 0, 0 );\r
-    }\r
-    if ( bExp == 0 ) {\r
-        if ( ( bSig0 | bSig1 ) == 0 ) {\r
-            if ( ( aExp | aSig0 | aSig1 ) == 0 ) {\r
- invalid:\r
-                float_raise( float_flag_invalid );\r
-                z.low = float64_default_nan_low;\r
-                z.high = float64_default_nan_high;\r
-                return z;\r
-            }\r
-            float_raise( float_flag_divbyzero );\r
-            return packFloat64( zSign, 0x7FF, 0, 0 );\r
-        }\r
-        normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( zSign, 0, 0, 0 );\r
-        normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
-    }\r
-    zExp = aExp - bExp + 0x3FD;\r
-    shortShift64Left( aSig0 | 0x00100000, aSig1, 11, &aSig0, &aSig1 );\r
-    shortShift64Left( bSig0 | 0x00100000, bSig1, 11, &bSig0, &bSig1 );\r
-    if ( le64( bSig0, bSig1, aSig0, aSig1 ) ) {\r
-        shift64Right( aSig0, aSig1, 1, &aSig0, &aSig1 );\r
-        ++zExp;\r
-    }\r
-    zSig0 = estimateDiv64To32( aSig0, aSig1, bSig0 );\r
-    mul64By32To96( bSig0, bSig1, zSig0, &term0, &term1, &term2 );\r
-    sub96( aSig0, aSig1, 0, term0, term1, term2, &rem0, &rem1, &rem2 );\r
-    while ( (sbits32) rem0 < 0 ) {\r
-        --zSig0;\r
-        add96( rem0, rem1, rem2, 0, bSig0, bSig1, &rem0, &rem1, &rem2 );\r
-    }\r
-    zSig1 = estimateDiv64To32( rem1, rem2, bSig0 );\r
-    if ( ( zSig1 & 0x3FF ) <= 4 ) {\r
-        mul64By32To96( bSig0, bSig1, zSig1, &term1, &term2, &term3 );\r
-        sub96( rem1, rem2, 0, term1, term2, term3, &rem1, &rem2, &rem3 );\r
-        while ( (sbits32) rem1 < 0 ) {\r
-            --zSig1;\r
-            add96( rem1, rem2, rem3, 0, bSig0, bSig1, &rem1, &rem2, &rem3 );\r
-        }\r
-        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
-    }\r
-    shift64ExtraRightJamming( zSig0, zSig1, 0, 11, &zSig0, &zSig1, &zSig2 );\r
-    return roundAndPackFloat64( zSign, zExp, zSig0, zSig1, zSig2 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the remainder of the double-precision floating-point value `a'\r
-| with respect to the corresponding value `b'.  The operation is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_rem( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign, zSign;\r
-    int16 aExp, bExp, expDiff;\r
-    bits32 aSig0, aSig1, bSig0, bSig1, q, term0, term1, term2;\r
-    bits32 allZero, alternateASig0, alternateASig1, sigMean1;\r
-    sbits32 sigMean0;\r
-    float64 z;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    bSig1 = extractFloat64Frac1( b );\r
-    bSig0 = extractFloat64Frac0( b );\r
-    bExp = extractFloat64Exp( b );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aExp == 0x7FF ) {\r
-        if (    ( aSig0 | aSig1 )\r
-             || ( ( bExp == 0x7FF ) && ( bSig0 | bSig1 ) ) ) {\r
-            return propagateFloat64NaN( a, b );\r
-        }\r
-        goto invalid;\r
-    }\r
-    if ( bExp == 0x7FF ) {\r
-        if ( bSig0 | bSig1 ) return propagateFloat64NaN( a, b );\r
-        return a;\r
-    }\r
-    if ( bExp == 0 ) {\r
-        if ( ( bSig0 | bSig1 ) == 0 ) {\r
- invalid:\r
-            float_raise( float_flag_invalid );\r
-            z.low = float64_default_nan_low;\r
-            z.high = float64_default_nan_high;\r
-            return z;\r
-        }\r
-        normalizeFloat64Subnormal( bSig0, bSig1, &bExp, &bSig0, &bSig1 );\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( ( aSig0 | aSig1 ) == 0 ) return a;\r
-        normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
-    }\r
-    expDiff = aExp - bExp;\r
-    if ( expDiff < -1 ) return a;\r
-    shortShift64Left(\r
-        aSig0 | 0x00100000, aSig1, 11 - ( expDiff < 0 ), &aSig0, &aSig1 );\r
-    shortShift64Left( bSig0 | 0x00100000, bSig1, 11, &bSig0, &bSig1 );\r
-    q = le64( bSig0, bSig1, aSig0, aSig1 );\r
-    if ( q ) sub64( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );\r
-    expDiff -= 32;\r
-    while ( 0 < expDiff ) {\r
-        q = estimateDiv64To32( aSig0, aSig1, bSig0 );\r
-        q = ( 4 < q ) ? q - 4 : 0;\r
-        mul64By32To96( bSig0, bSig1, q, &term0, &term1, &term2 );\r
-        shortShift96Left( term0, term1, term2, 29, &term1, &term2, &allZero );\r
-        shortShift64Left( aSig0, aSig1, 29, &aSig0, &allZero );\r
-        sub64( aSig0, 0, term1, term2, &aSig0, &aSig1 );\r
-        expDiff -= 29;\r
-    }\r
-    if ( -32 < expDiff ) {\r
-        q = estimateDiv64To32( aSig0, aSig1, bSig0 );\r
-        q = ( 4 < q ) ? q - 4 : 0;\r
-        q >>= - expDiff;\r
-        shift64Right( bSig0, bSig1, 8, &bSig0, &bSig1 );\r
-        expDiff += 24;\r
-        if ( expDiff < 0 ) {\r
-            shift64Right( aSig0, aSig1, - expDiff, &aSig0, &aSig1 );\r
-        }\r
-        else {\r
-            shortShift64Left( aSig0, aSig1, expDiff, &aSig0, &aSig1 );\r
-        }\r
-        mul64By32To96( bSig0, bSig1, q, &term0, &term1, &term2 );\r
-        sub64( aSig0, aSig1, term1, term2, &aSig0, &aSig1 );\r
-    }\r
-    else {\r
-        shift64Right( aSig0, aSig1, 8, &aSig0, &aSig1 );\r
-        shift64Right( bSig0, bSig1, 8, &bSig0, &bSig1 );\r
-    }\r
-    do {\r
-        alternateASig0 = aSig0;\r
-        alternateASig1 = aSig1;\r
-        ++q;\r
-        sub64( aSig0, aSig1, bSig0, bSig1, &aSig0, &aSig1 );\r
-    } while ( 0 <= (sbits32) aSig0 );\r
-    add64(\r
-        aSig0, aSig1, alternateASig0, alternateASig1, (bits32 *)&sigMean0, &sigMean1 );\r
-    if (    ( sigMean0 < 0 )\r
-         || ( ( ( sigMean0 | sigMean1 ) == 0 ) && ( q & 1 ) ) ) {\r
-        aSig0 = alternateASig0;\r
-        aSig1 = alternateASig1;\r
-    }\r
-    zSign = ( (sbits32) aSig0 < 0 );\r
-    if ( zSign ) sub64( 0, 0, aSig0, aSig1, &aSig0, &aSig1 );\r
-    return\r
-        normalizeRoundAndPackFloat64( aSign ^ zSign, bExp - 4, aSig0, aSig1 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns the square root of the double-precision floating-point value `a'.\r
-| The operation is performed according to the IEC/IEEE Standard for Binary\r
-| Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-float64 float64_sqrt( float64 a )\r
-{\r
-    flag aSign;\r
-    int16 aExp, zExp;\r
-    bits32 aSig0, aSig1, zSig0, zSig1, zSig2, doubleZSig0;\r
-    bits32 rem0, rem1, rem2, rem3, term0, term1, term2, term3;\r
-    float64 z;\r
-\r
-    aSig1 = extractFloat64Frac1( a );\r
-    aSig0 = extractFloat64Frac0( a );\r
-    aExp = extractFloat64Exp( a );\r
-    aSign = extractFloat64Sign( a );\r
-    if ( aExp == 0x7FF ) {\r
-        if ( aSig0 | aSig1 ) return propagateFloat64NaN( a, a );\r
-        if ( ! aSign ) return a;\r
-        goto invalid;\r
-    }\r
-    if ( aSign ) {\r
-        if ( ( aExp | aSig0 | aSig1 ) == 0 ) return a;\r
- invalid:\r
-        float_raise( float_flag_invalid );\r
-        z.low = float64_default_nan_low;\r
-        z.high = float64_default_nan_high;\r
-        return z;\r
-    }\r
-    if ( aExp == 0 ) {\r
-        if ( ( aSig0 | aSig1 ) == 0 ) return packFloat64( 0, 0, 0, 0 );\r
-        normalizeFloat64Subnormal( aSig0, aSig1, &aExp, &aSig0, &aSig1 );\r
-    }\r
-    zExp = ( ( aExp - 0x3FF )>>1 ) + 0x3FE;\r
-    aSig0 |= 0x00100000;\r
-    shortShift64Left( aSig0, aSig1, 11, &term0, &term1 );\r
-    zSig0 = ( estimateSqrt32( aExp, term0 )>>1 ) + 1;\r
-    if ( zSig0 == 0 ) zSig0 = 0x7FFFFFFF;\r
-    doubleZSig0 = zSig0 + zSig0;\r
-    shortShift64Left( aSig0, aSig1, 9 - ( aExp & 1 ), &aSig0, &aSig1 );\r
-    mul32To64( zSig0, zSig0, &term0, &term1 );\r
-    sub64( aSig0, aSig1, term0, term1, &rem0, &rem1 );\r
-    while ( (sbits32) rem0 < 0 ) {\r
-        --zSig0;\r
-        doubleZSig0 -= 2;\r
-        add64( rem0, rem1, 0, doubleZSig0 | 1, &rem0, &rem1 );\r
-    }\r
-    zSig1 = estimateDiv64To32( rem1, 0, doubleZSig0 );\r
-    if ( ( zSig1 & 0x1FF ) <= 5 ) {\r
-        if ( zSig1 == 0 ) zSig1 = 1;\r
-        mul32To64( doubleZSig0, zSig1, &term1, &term2 );\r
-        sub64( rem1, 0, term1, term2, &rem1, &rem2 );\r
-        mul32To64( zSig1, zSig1, &term2, &term3 );\r
-        sub96( rem1, rem2, 0, 0, term2, term3, &rem1, &rem2, &rem3 );\r
-        while ( (sbits32) rem1 < 0 ) {\r
-            --zSig1;\r
-            shortShift64Left( 0, zSig1, 1, &term2, &term3 );\r
-            term3 |= 1;\r
-            term2 |= doubleZSig0;\r
-            add96( rem1, rem2, rem3, 0, term2, term3, &rem1, &rem2, &rem3 );\r
-        }\r
-        zSig1 |= ( ( rem1 | rem2 | rem3 ) != 0 );\r
-    }\r
-    shift64ExtraRightJamming( zSig0, zSig1, 0, 10, &zSig0, &zSig1, &zSig2 );\r
-    return roundAndPackFloat64( 0, zExp, zSig0, zSig1, zSig2 );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is equal to\r
-| the corresponding value `b', and 0 otherwise.  The comparison is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float64_eq( float64 a, float64 b )\r
-{\r
-\r
-    if (    (    ( extractFloat64Exp( a ) == 0x7FF )\r
-              && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
-         || (    ( extractFloat64Exp( b ) == 0x7FF )\r
-              && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
-       ) {\r
-        if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
-            float_raise( float_flag_invalid );\r
-        }\r
-        return 0;\r
-    }\r
-    return\r
-           ( a.low == b.low )\r
-        && (    ( a.high == b.high )\r
-             || (    ( a.low == 0 )\r
-                  && ( (bits32) ( ( a.high | b.high )<<1 ) == 0 ) )\r
-           );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is less than\r
-| or equal to the corresponding value `b', and 0 otherwise.  The comparison\r
-| is performed according to the IEC/IEEE Standard for Binary Floating-Point\r
-| Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float64_le( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    (    ( extractFloat64Exp( a ) == 0x7FF )\r
-              && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
-         || (    ( extractFloat64Exp( b ) == 0x7FF )\r
-              && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
-       ) {\r
-        float_raise( float_flag_invalid );\r
-        return 0;\r
-    }\r
-    aSign = extractFloat64Sign( a );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aSign != bSign ) {\r
-        return\r
-               aSign\r
-            || (    ( ( (bits32) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
-                 == 0 );\r
-    }\r
-    return\r
-          aSign ? le64( b.high, b.low, a.high, a.low )\r
-        : le64( a.high, a.low, b.high, b.low );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is less than\r
-| the corresponding value `b', and 0 otherwise.  The comparison is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float64_lt( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    (    ( extractFloat64Exp( a ) == 0x7FF )\r
-              && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
-         || (    ( extractFloat64Exp( b ) == 0x7FF )\r
-              && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
-       ) {\r
-        float_raise( float_flag_invalid );\r
-        return 0;\r
-    }\r
-    aSign = extractFloat64Sign( a );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aSign != bSign ) {\r
-        return\r
-               aSign\r
-            && (    ( ( (bits32) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
-                 != 0 );\r
-    }\r
-    return\r
-          aSign ? lt64( b.high, b.low, a.high, a.low )\r
-        : lt64( a.high, a.low, b.high, b.low );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is equal to\r
-| the corresponding value `b', and 0 otherwise.  The invalid exception is\r
-| raised if either operand is a NaN.  Otherwise, the comparison is performed\r
-| according to the IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float64_eq_signaling( float64 a, float64 b )\r
-{\r
-\r
-    if (    (    ( extractFloat64Exp( a ) == 0x7FF )\r
-              && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
-         || (    ( extractFloat64Exp( b ) == 0x7FF )\r
-              && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
-       ) {\r
-        float_raise( float_flag_invalid );\r
-        return 0;\r
-    }\r
-    return\r
-           ( a.low == b.low )\r
-        && (    ( a.high == b.high )\r
-             || (    ( a.low == 0 )\r
-                  && ( (bits32) ( ( a.high | b.high )<<1 ) == 0 ) )\r
-           );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is less than or\r
-| equal to the corresponding value `b', and 0 otherwise.  Quiet NaNs do not\r
-| cause an exception.  Otherwise, the comparison is performed according to the\r
-| IEC/IEEE Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float64_le_quiet( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    (    ( extractFloat64Exp( a ) == 0x7FF )\r
-              && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
-         || (    ( extractFloat64Exp( b ) == 0x7FF )\r
-              && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
-       ) {\r
-        if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
-            float_raise( float_flag_invalid );\r
-        }\r
-        return 0;\r
-    }\r
-    aSign = extractFloat64Sign( a );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aSign != bSign ) {\r
-        return\r
-               aSign\r
-            || (    ( ( (bits32) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
-                 == 0 );\r
-    }\r
-    return\r
-          aSign ? le64( b.high, b.low, a.high, a.low )\r
-        : le64( a.high, a.low, b.high, b.low );\r
-\r
-}\r
-\r
-/*----------------------------------------------------------------------------\r
-| Returns 1 if the double-precision floating-point value `a' is less than\r
-| the corresponding value `b', and 0 otherwise.  Quiet NaNs do not cause an\r
-| exception.  Otherwise, the comparison is performed according to the IEC/IEEE\r
-| Standard for Binary Floating-Point Arithmetic.\r
-*----------------------------------------------------------------------------*/\r
-\r
-flag float64_lt_quiet( float64 a, float64 b )\r
-{\r
-    flag aSign, bSign;\r
-\r
-    if (    (    ( extractFloat64Exp( a ) == 0x7FF )\r
-              && ( extractFloat64Frac0( a ) | extractFloat64Frac1( a ) ) )\r
-         || (    ( extractFloat64Exp( b ) == 0x7FF )\r
-              && ( extractFloat64Frac0( b ) | extractFloat64Frac1( b ) ) )\r
-       ) {\r
-        if ( float64_is_signaling_nan( a ) || float64_is_signaling_nan( b ) ) {\r
-            float_raise( float_flag_invalid );\r
-        }\r
-        return 0;\r
-    }\r
-    aSign = extractFloat64Sign( a );\r
-    bSign = extractFloat64Sign( b );\r
-    if ( aSign != bSign ) {\r
-        return\r
-               aSign\r
-            && (    ( ( (bits32) ( ( a.high | b.high )<<1 ) ) | a.low | b.low )\r
-                 != 0 );\r
-    }\r
-    return\r
-          aSign ? lt64( b.high, b.low, a.high, a.low )\r
-        : lt64( a.high, a.low, b.high, b.low );\r
-\r
-}\r
-\r

diff --git a/software/libbase/softfloat.h b/software/libbase/softfloat.h
deleted file mode 100644 (file)
index 0dad06b..0000000
--- a/software/libbase/softfloat.h
+++ /dev/null
@@ -1,136 +0,0 @@
-\r
-/*============================================================================\r
-\r
-This C header file is part of the SoftFloat IEC/IEEE Floating-point Arithmetic\r
-Package, Release 2b.\r
-\r
-Written by John R. Hauser.  This work was made possible in part by the\r
-International Computer Science Institute, located at Suite 600, 1947 Center\r
-Street, Berkeley, California 94704.  Funding was partially provided by the\r
-National Science Foundation under grant MIP-9311980.  The original version\r
-of this code was written as part of a project to build a fixed-point vector\r
-processor in collaboration with the University of California at Berkeley,\r
-overseen by Profs. Nelson Morgan and John Wawrzynek.  More information\r
-is available through the Web page `http://www.cs.berkeley.edu/~jhauser/\r
-arithmetic/SoftFloat.html'.\r
-\r
-THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE.  Although reasonable effort has\r
-been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT TIMES\r
-RESULT IN INCORRECT BEHAVIOR.  USE OF THIS SOFTWARE IS RESTRICTED TO PERSONS\r
-AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ALL LOSSES,\r
-COSTS, OR OTHER PROBLEMS THEY INCUR DUE TO THE SOFTWARE, AND WHO FURTHERMORE\r
-EFFECTIVELY INDEMNIFY JOHN HAUSER AND THE INTERNATIONAL COMPUTER SCIENCE\r
-INSTITUTE (possibly via similar legal warning) AGAINST ALL LOSSES, COSTS, OR\r
-OTHER PROBLEMS INCURRED BY THEIR CUSTOMERS AND CLIENTS DUE TO THE SOFTWARE.\r
-\r
-Derivative works are acceptable, even for commercial purposes, so long as\r
-(1) the source code for the derivative work includes prominent notice that\r
-the work is derivative, and (2) the source code includes prominent notice with\r
-these four paragraphs for those parts of this code that are retained.\r
-\r
-=============================================================================*/\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE floating-point types.\r
-*----------------------------------------------------------------------------*/\r
-typedef bits32 float32;\r
-typedef struct {\r
-    bits32 high, low;\r
-} float64;\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE floating-point underflow tininess-detection mode.\r
-*----------------------------------------------------------------------------*/\r
-extern int8 float_detect_tininess;\r
-enum {\r
-    float_tininess_after_rounding  = 0,\r
-    float_tininess_before_rounding = 1\r
-};\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE floating-point rounding mode.\r
-*----------------------------------------------------------------------------*/\r
-extern int8 float_rounding_mode;\r
-enum {\r
-    float_round_nearest_even = 0,\r
-    float_round_to_zero      = 1,\r
-    float_round_down         = 2,\r
-    float_round_up           = 3\r
-};\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE floating-point exception flags.\r
-*----------------------------------------------------------------------------*/\r
-extern int8 float_exception_flags;\r
-enum {\r
-    float_flag_inexact   =  1,\r
-    float_flag_underflow =  2,\r
-    float_flag_overflow  =  4,\r
-    float_flag_divbyzero =  8,\r
-    float_flag_invalid   = 16\r
-};\r
-\r
-/*----------------------------------------------------------------------------\r
-| Routine to raise any or all of the software IEC/IEEE floating-point\r
-| exception flags.\r
-*----------------------------------------------------------------------------*/\r
-void float_raise( int8 );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE integer-to-floating-point conversion routines.\r
-*----------------------------------------------------------------------------*/\r
-float32 int32_to_float32( int32 );\r
-float64 int32_to_float64( int32 );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE single-precision conversion routines.\r
-*----------------------------------------------------------------------------*/\r
-int32 float32_to_int32( float32 );\r
-int32 float32_to_int32_round_to_zero( float32 );\r
-float64 float32_to_float64( float32 );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE single-precision operations.\r
-*----------------------------------------------------------------------------*/\r
-float32 float32_round_to_int( float32 );\r
-float32 float32_add( float32, float32 );\r
-float32 float32_sub( float32, float32 );\r
-float32 float32_mul( float32, float32 );\r
-float32 float32_div( float32, float32 );\r
-float32 float32_rem( float32, float32 );\r
-float32 float32_sqrt( float32 );\r
-flag float32_eq( float32, float32 );\r
-flag float32_le( float32, float32 );\r
-flag float32_lt( float32, float32 );\r
-flag float32_eq_signaling( float32, float32 );\r
-flag float32_le_quiet( float32, float32 );\r
-flag float32_lt_quiet( float32, float32 );\r
-flag float32_is_nan( float32 );\r
-flag float32_is_signaling_nan( float32 );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE double-precision conversion routines.\r
-*----------------------------------------------------------------------------*/\r
-int32 float64_to_int32( float64 );\r
-int32 float64_to_int32_round_to_zero( float64 );\r
-float32 float64_to_float32( float64 );\r
-\r
-/*----------------------------------------------------------------------------\r
-| Software IEC/IEEE double-precision operations.\r
-*----------------------------------------------------------------------------*/\r
-float64 float64_round_to_int( float64 );\r
-float64 float64_add( float64, float64 );\r
-float64 float64_sub( float64, float64 );\r
-float64 float64_mul( float64, float64 );\r
-float64 float64_div( float64, float64 );\r
-float64 float64_rem( float64, float64 );\r
-float64 float64_sqrt( float64 );\r
-flag float64_eq( float64, float64 );\r
-flag float64_le( float64, float64 );\r
-flag float64_lt( float64, float64 );\r
-flag float64_eq_signaling( float64, float64 );\r
-flag float64_le_quiet( float64, float64 );\r
-flag float64_lt_quiet( float64, float64 );\r
-flag float64_is_nan( float64 );\r
-flag float64_is_signaling_nan( float64 );\r
-\r