(no commit message)

diff --git a/simple_v_extension/sv_prefix_proposal/discussion.rst b/simple_v_extension/sv_prefix_proposal/discussion.rst
index dac2516d801618de1adcb870c11f9220ea507b31..94fb6b45e3b8eeb2311037de669b5184c727c021 100644 (file)
--- a/simple_v_extension/sv_prefix_proposal/discussion.rst
+++ b/simple_v_extension/sv_prefix_proposal/discussion.rst
@@ -268,18 +268,16 @@ experiment 2:
 | VLtyp[11] | VLtyp[10:6] | VLtyp[5]   | VLtyp[4:3]   | VLtyp[2:0] | comment              |
 +-----------+-------------+---------------------------+------------+----------------------+
 | 0         |  00000      | 0            00           |  000       | no change to VL/MVL  |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 0         |  imm        | 000        |              |  rs'!=0    |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 0         |  imm        | rd'!=0     |              |  000       |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 0         |  imm        | rd'!=0     |              |  rs'!=0    |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 1         |  imm        | 000        |              |  000       |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 1         |  imm        | 000        |              |  rs'!=0    |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 1         |  imm        | rd'!=0     |              | 000        |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
-| 1         |  imm        | rd'!=0     |              |  rs'!=0    |                      |
-+-----------+-------------+------------+--------------+------------+----------------------+
++-----------+-------------+---------------------------+------------+----------------------+
+| 0         |  imm        | 000                       |  rs'!=0    | sv.setvl immed mode  |
++-----------+-------------+---------------------------+------------+----------------------+
+| 0         |  imm        | rd'!=0                    |  000       | not sure             |
++-----------+-------------+---------------------------+------------+----------------------+
+| 0         |  imm        | rd'!=0                    |  rs'!=0    | sv.setvl rd, rs, MVL |
++-----------+-------------+------------+---------------------------+----------------------+
+| 1         |  imm        | 0          |  00000                    | set MVL immed        |
++-----------+-------------+------------+---------------------------+----------------------+
+| 1         |  imm        | 1          |  rd[4:0]                  | sv.setvl rd, immed   |
++-----------+-------------+------------+---------------------------+----------------------+
+
+