#include "debug/IPR.hh"
#include "debug/TLB.hh"
#include "mem/packet_access.hh"
+#include "mem/page_table.hh"
#include "mem/request.hh"
#include "sim/full_system.hh"
+#include "sim/process.hh"
#include "sim/system.hh"
/* @todo remove some of the magic constants. -- ali
bool real = (mode == Execute) ? inst_real : data_real;
- PortProxy &mem = tc->getPhysProxy();
TlbEntry* tbe;
PageTableEntry pte;
Addr tsbs[4];
return NoFault;
}
- if (vaddr & (size - 1))
- return std::make_shared<MemAddressNotAligned>();
-
if (addr_mask)
vaddr = vaddr & VAddrAMask;
return NoFault;
}
+ if (!FullSystem)
+ return tc->getProcessPtr()->pTable->translate(req);
+
+ PortProxy &mem = tc->getPhysProxy();
// We didn't find it in the tlbs, so lets look at the TSBs
GetTsbPtr(tc, vaddr, ctx_zero ? 0 : pri_context, tsbs);
va_tag = bits(vaddr, 63, 22);