freedreno/a3xx: remove blend clamp enables from gmem/clears

Just pass the data through unmolested. This probably has no effect since
blending isn't actually enabled.

Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu>

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
index fe53c8ece7a4aed94c5fe9a8d57094bb131156c8..ff6db58f783e78a5d3ea11630f21d6116a554b2f 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_draw.c
@@ -323,8 +323,7 @@ fd3_clear(struct fd_context *ctx, unsigned buffers,
                                A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(FACTOR_ZERO) |
                                A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(FACTOR_ONE) |
                                A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(BLEND_DST_PLUS_SRC) |
-                               A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO) |
-                               A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE);
+                               A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO));
        }
 
        OUT_PKT0(ring, REG_A3XX_GRAS_SU_MODE_CONTROL, 1);

diff --git a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
index 1dd43cc6b4c5f9049ed384d8a0ce4e9aa40423e5..dae0b1136354b11a187ee2a3505d6627e4dc6268 100644 (file)
--- a/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
+++ b/src/gallium/drivers/freedreno/a3xx/fd3_gmem.c
@@ -493,8 +493,7 @@ fd3_emit_tile_mem2gmem(struct fd_context *ctx, struct fd_tile *tile)
                                A3XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(FACTOR_ZERO) |
                                A3XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(FACTOR_ONE) |
                                A3XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(BLEND_DST_PLUS_SRC) |
-                               A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO) |
-                               A3XX_RB_MRT_BLEND_CONTROL_CLAMP_ENABLE);
+                               A3XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(FACTOR_ZERO));
        }
 
        OUT_PKT0(ring, REG_A3XX_RB_RENDER_CONTROL, 1);