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diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index ea39c854afc5494283ede1776795d7c4c5a83bae..0d54396358bef0a9980a200572e01a93d612483a 100644 (file)
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -19,8 +19,8 @@ history of computing, not with the combined resources of ARM, Intel,
 AMD, MIPS, Sun Microsystems, SGI, Cray, and many more. (*Hand-crafted
 assembler and direct use of intrinsics is the Industry-standard norm
 to achieve high-performance optimisation where it matters*).
-Rather: GPUs
-have ultra-specialist compilers (CUDA) that are designed from the ground up
+GPUs full this void both in hardware and software terms by having
+ultra-specialist compilers (CUDA) that are designed from the ground up
 to support Vector/SIMD parallelism, and associated standards
 (SPIR-V, Vulkan, OpenCL) managed by
 the Khronos Group, with multi-man-century development committment from
@@ -30,7 +30,7 @@ Therefore it begs the question, why on earth would anyone consider
 this task, and what, in Computer Science, actually needs solving?
 
 First hints are that whilst memory bitcells have not increased in speed
-since the 90s (around 150 mhz), increasing the bank width and
+since the 90s (around 150 mhz), increasing the bank width, striping, and
 datapath widths and speeds to the same has allowed
 significant apparent speed increases: 3200 mhz DDR4 and even faster DDR5,
 and other advanced Memory interfaces such as HBM, Gen-Z, and OpenCAPI,