gallium/util: don't modify usage in pipe_buffer_write
authorMarek Olšák <marek.olsak@amd.com>
Sun, 17 Jul 2016 12:34:50 +0000 (14:34 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Sat, 23 Jul 2016 11:33:42 +0000 (13:33 +0200)
All drivers were already doing it except virgl.

Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/auxiliary/util/u_inlines.h
src/gallium/drivers/virgl/virgl_resource.c

index 07f73546ad7d34fb6093e468e5d97b6a2a40608b..c2a0b08d151409de651fb7188acc4dde5cb7abeb 100644 (file)
@@ -339,15 +339,8 @@ pipe_buffer_write(struct pipe_context *pipe,
                   unsigned size,
                   const void *data)
 {
-   unsigned access = PIPE_TRANSFER_WRITE;
-
-   if (offset == 0 && size == buf->width0) {
-      access |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
-   } else {
-      access |= PIPE_TRANSFER_DISCARD_RANGE;
-   }
-
-   pipe->buffer_subdata(pipe, buf, access, offset, size, data);
+   /* Don't set any other usage bits. Drivers should derive them. */
+   pipe->buffer_subdata(pipe, buf, PIPE_TRANSFER_WRITE, offset, size, data);
 }
 
 /**
index 441b0c117038eb120a41dfddd56cffce4a937176..db5e7dd61af2d87eba7561ff44c7147f53c4c4c6 100644 (file)
@@ -89,6 +89,11 @@ static void virgl_buffer_subdata(struct pipe_context *pipe,
 {
    struct pipe_box box;
 
+   if (offset == 0 && size == resource->width0)
+      usage |= PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE;
+   else
+      usage |= PIPE_TRANSFER_DISCARD_RANGE;
+
    u_box_1d(offset, size, &box);
    virgl_transfer_inline_write(pipe, resource, 0, usage, &box, data, 0, 0);
 }