ppc: support ffnmadds instruction
authorDmitry Selyutin <ghostmansd@gmail.com>
Sun, 28 May 2023 22:04:57 +0000 (01:04 +0300)
committerDmitry Selyutin <ghostmansd@gmail.com>
Tue, 14 Nov 2023 19:53:37 +0000 (22:53 +0300)
gas/testsuite/gas/ppc/ffnmadds.d [new file with mode: 0644]
gas/testsuite/gas/ppc/ffnmadds.s [new file with mode: 0644]
gas/testsuite/gas/ppc/ppc.exp
opcodes/ppc-opc.c

diff --git a/gas/testsuite/gas/ppc/ffnmadds.d b/gas/testsuite/gas/ppc/ffnmadds.d
new file mode 100644 (file)
index 0000000..b9fd863
--- /dev/null
@@ -0,0 +1,14 @@
+#as: -mlibresoc
+#objdump: -dr -Mlibresoc
+
+.*:     file format .*
+
+
+Disassembly of section \.text:
+0+ <\.text>:
+.*:\s+(ef e0 00 0e|0e 00 e0 ef)\s+ffnmadds\s+f31,f0,f0
+.*:\s+(ec 1f 00 0e|0e 00 1f ec)\s+ffnmadds\s+f0,f31,f0
+.*:\s+(ec 00 f8 0e|0e f8 00 ec)\s+ffnmadds\s+f0,f0,f31
+.*:\s+(ef e0 00 0f|0f 00 e0 ef)\s+ffnmadds.\s+f31,f0,f0
+.*:\s+(ec 1f 00 0f|0f 00 1f ec)\s+ffnmadds.\s+f0,f31,f0
+.*:\s+(ec 00 f8 0f|0f f8 00 ec)\s+ffnmadds.\s+f0,f0,f31
diff --git a/gas/testsuite/gas/ppc/ffnmadds.s b/gas/testsuite/gas/ppc/ffnmadds.s
new file mode 100644 (file)
index 0000000..6bcae7b
--- /dev/null
@@ -0,0 +1,6 @@
+ffnmadds 31,0,0
+ffnmadds 0,31,0
+ffnmadds 0,0,31
+ffnmadds. 31,0,0
+ffnmadds. 0,31,0
+ffnmadds. 0,0,31
index 222363e7f1c4d670aa90c421fc43dc472de9f9a9..18c7ba0d842b9b7ef0f6c503223344bc8e8b8a3f 100644 (file)
@@ -178,3 +178,4 @@ run_dump_test "minmax"
 run_dump_test "ffmsubs"
 run_dump_test "ffmadds"
 run_dump_test "ffnmsubs"
+run_dump_test "ffnmadds"
index 315a884f926ef3965af166e9532916448b865bad..63507983c669b264ff3a9d7b49e89d0851e8ecb8 100644 (file)
@@ -9194,6 +9194,9 @@ const struct powerpc_opcode powerpc_opcodes[] = {
 {"ffnmsubs",   A(59,6,0),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
 {"ffnmsubs.",  A(59,6,1),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
 
+{"ffnmadds",   A(59,7,0),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
+{"ffnmadds.",  A(59,7,1),      AFRC_MASK,   SFFS,      PPCVLE,         {FRT, FRA, FRB}},
+
 {"fdivs",      A(59,18,0),     AFRC_MASK,   PPC,       PPCEFS|PPCVLE,  {FRT, FRA, FRB}},
 {"fdivs.",     A(59,18,1),     AFRC_MASK,   PPC,       PPCEFS|PPCVLE,  {FRT, FRA, FRB}},