+2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26237
+ * testsuite/gas/i386/addr32.s: Add tests for 32-bit wrapped around
+ address.
+ * testsuite/gas/i386/x86-64-addr32.s: Likewise.
+ * testsuite/gas/i386/addr32.d: Updated.
+ * testsuite/gas/i386/x86-64-addr32-intel.d: Likewise.
+ * testsuite/gas/i386/x86-64-addr32.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-addr32-intel.d: Likewise.
+ * testsuite/gas/i386/ilp32/x86-64-addr32.d: Likewise.
+
2020-07-14 Jan Beulich <jbeulich@suse.com>
* testsuite/gas/i386/intel.s: Use dr<N> instead of db<N>.
[ ]*19:[ ]+67 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%ax,0x600898
[ ]*1f:[ ]+67 66 a3 98 08 60 00[ ]+addr32[ ]+mov[ ]+%eax,0x600898
[ ]*26:[ ]+67 66 c7 04 24 01 00 00 00[ ]+movl[ ]+\$0x1,\(%esp\)
+[ ]*2f:[ ]+67 66 a1 ef cd ab 89[ ]+addr32[ ]+mov[ ]+0x89abcdef,%eax
+[ ]*36:[ ]+67 66 8b 1d ef cd ab 89[ ]+addr32[ ]+mov[ ]+0x89abcdef,%ebx
+[ ]*3e:[ ]+67 66 b8 ef cd ab 89[ ]+addr32[ ]+mov[ ]+\$0x89abcdef,%eax
+[ ]*45:[ ]+67 66 bb ef cd ab 89[ ]+addr32[ ]+mov[ ]+\$0x89abcdef,%ebx
+[ ]*4c:[ ]+67 66 a3 ef cd ab 89[ ]+addr32[ ]+mov[ ]+%eax,0x89abcdef
+[ ]*53:[ ]+67 66 89 1d ef cd ab 89[ ]+addr32[ ]+mov[ ]+%ebx,0x89abcdef
#pass
addr32 mov %ax,0x600898
addr32 mov %eax,0x600898
addr32 movl $0x1,(%esp)
+ addr32 mov 0x89abcdef,%eax
+ addr32 mov 0x89abcdef,%ebx
+ addr32 mov $0x89abcdef,%eax
+ addr32 mov $0x89abcdef,%ebx
+ addr32 mov %eax,0x89abcdef
+ addr32 mov %ebx,0x89abcdef
#objdump: -drwMintel
#source: ../x86-64-addr32.s
#name: x86-64 (ILP32) 32-bit addressing (Intel mode)
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[eax\+0x0\].*
-[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+rax,\[r8d\+0x0\].*
-[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+rax,\[eip\+0x0\].*
-[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00 lea[ ]+rax,\[eiz\*1\+0x0\].*
-[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov al,ds:0x600898
-[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov ax,ds:0x600898
-[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov eax,ds:0x600898
-[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
-[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
-[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
-[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
-[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax
-[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
-[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
-[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
-[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
-[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1-0xccddef\],eax
-[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2-0xccddef\],eax
-#pass
+#dump: ../x86-64-addr32-intel.d
#as: -J
#objdump: -drw
#name: x86-64 (ILP32) 32-bit addressing
-
-.*: +file format .*
-
-Disassembly of section .text:
-
-0+ <.text>:
-[ ]*[a-f0-9]+: 67 48 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%eax\),%rax.*
-[ ]*[a-f0-9]+: 67 49 8d 80 00 00 00 00[ ]+lea[ ]+0x0\(%r8d\),%rax.*
-[ ]*[a-f0-9]+: 67 48 8d 05 00 00 00 00[ ]+lea[ ]+0x0\(%eip\),%rax.*
-[ ]*[a-f0-9]+: 67 48 8d 04 25 00 00 00 00[ ]+lea[ ]+0x0\(,%eiz,1\),%rax.*
-[ ]*[a-f0-9]+: 67 a0 98 08 60 00 addr32 mov 0x600898,%al
-[ ]*[a-f0-9]+: 67 66 a1 98 08 60 00 addr32 mov 0x600898,%ax
-[ ]*[a-f0-9]+: 67 a1 98 08 60 00 addr32 mov 0x600898,%eax
-[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
-[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
-[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898\(,%eiz,1\),%rbx
-[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
-[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898
-[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
-[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
-[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
-[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898\(,%eiz,1\)
-[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,1\)
-[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,2\)
-#pass
+#dump: ../x86-64-addr32.d
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov rax,ds:0x600898
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov rax,ds:0x800898
[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x800898\]
+[ ]*[a-f0-9]+: 67 48 a1 ef cd ab 89 addr32 mov rax,ds:0x89abcdef
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+rbx,QWORD PTR \[eiz\*1\+0x89abcdef\]
+[ ]*[a-f0-9]+: 67 48 b8 ef cd ab 89 00 00 00 00 addr32 movabs rax,0x89abcdef
+[ ]*[a-f0-9]+: 67 48 bb ef cd ab 89 00 00 00 00 addr32 movabs rbx,0x89abcdef
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov ds:0x600898,al
[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov ds:0x600898,ax
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov ds:0x600898,eax
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov ds:0x600898,rax
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov ds:0x800898,rax
[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+QWORD PTR \[eiz\*1\+0x800898\],rbx
-[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1-0xccddef\],eax
-[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2-0xccddef\],eax
+[ ]*[a-f0-9]+: 67 48 a3 ef cd ab 89 addr32 mov ds:0x89abcdef,rax
+[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+QWORD PTR \[eiz\*1\+0x89abcdef\],rbx
+[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*1\+0xff332211\],eax
+[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+DWORD PTR \[eiz\*2\+0xff332211\],eax
#pass
[ ]*[a-f0-9]+: 67 48 a1 98 08 60 00 addr32 mov 0x600898,%rax
[ ]*[a-f0-9]+: 67 48 a1 98 08 80 00 addr32 mov 0x800898,%rax
[ ]*[a-f0-9]+: 67 48 8b 1c 25 98 08 80 00 mov[ ]+0x800898\(,%eiz,1\),%rbx
+[ ]*[a-f0-9]+: 67 48 a1 ef cd ab 89 addr32 mov 0x89abcdef,%rax
+[ ]*[a-f0-9]+: 67 48 8b 1c 25 ef cd ab 89 mov[ ]+0x89abcdef\(,%eiz,1\),%rbx
+[ ]*[a-f0-9]+: 67 48 b8 ef cd ab 89 00 00 00 00 addr32 movabs \$0x89abcdef,%rax
+[ ]*[a-f0-9]+: 67 48 bb ef cd ab 89 00 00 00 00 addr32 movabs \$0x89abcdef,%rbx
[ ]*[a-f0-9]+: 67 a2 98 08 60 00 addr32 mov %al,0x600898
[ ]*[a-f0-9]+: 67 66 a3 98 08 60 00 addr32 mov %ax,0x600898
[ ]*[a-f0-9]+: 67 a3 98 08 60 00 addr32 mov %eax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 60 00 addr32 mov %rax,0x600898
[ ]*[a-f0-9]+: 67 48 a3 98 08 80 00 addr32 mov %rax,0x800898
[ ]*[a-f0-9]+: 67 48 89 1c 25 98 08 80 00 mov[ ]+%rbx,0x800898\(,%eiz,1\)
-[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,1\)
-[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,-0xccddef\(,%eiz,2\)
+[ ]*[a-f0-9]+: 67 48 a3 ef cd ab 89 addr32 mov %rax,0x89abcdef
+[ ]*[a-f0-9]+: 67 48 89 1c 25 ef cd ab 89 mov[ ]+%rbx,0x89abcdef\(,%eiz,1\)
+[ ]*[a-f0-9]+: 67 89 04 25 11 22 33 ff mov[ ]+%eax,0xff332211\(,%eiz,1\)
+[ ]*[a-f0-9]+: 67 89 04 65 11 22 33 ff mov[ ]+%eax,0xff332211\(,%eiz,2\)
#pass
addr32 mov 0x600898,%rax
addr32 mov 0x800898,%rax
addr32 mov 0x800898,%rbx
+ addr32 mov 0x89abcdef,%rax
+ addr32 mov 0x89abcdef,%rbx
+ addr32 mov $0x89abcdef,%rax
+ addr32 mov $0x89abcdef,%rbx
addr32 mov %al,0x600898
addr32 mov %ax,0x600898
addr32 mov %eax,0x600898
addr32 mov %rax,0x600898
addr32 mov %rax,0x800898
addr32 mov %rbx,0x800898
+ addr32 mov %rax,0x89abcdef
+ addr32 mov %rbx,0x89abcdef
mov %eax, -0xccddef(,%eiz,)
mov %eax, -0xccddef(,%eiz,2)
+2020-07-14 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR gas/26237
+ * i386-dis.c (OP_E_memory): Without base nor index registers,
+ 32-bit displacement to 64 bits.
+
2020-07-14 Claudiu Zissulescu <claziss@gmail.com>
* arc-dis.c (print_insn_arc): Detect and emit a warning when a
{
if (address_mode == mode_64bit)
{
- /* Display eiz instead of addr32. */
- needindex = addr32flag;
+ if (addr32flag)
+ {
+ /* Without base nor index registers, zero-extend the
+ lower 32-bit displacement to 64 bits. */
+ disp = (unsigned int) disp;
+ needindex = 1;
+ }
needaddr32 = 1;
}
else