(no commit message)

diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn
index 4f9abad97a95b9afa3566c0d4473794186198939..63db85117bc7266f785fa8318fedc98e42dec6e6 100644 (file)
--- a/openpower/sv/bitmanip.mdwn
+++ b/openpower/sv/bitmanip.mdwn
@@ -223,6 +223,17 @@ another mode selection would be CRs not Ints.
               crregs[BC][i]
         crregs[BA][i] = (imm & (1<<idx)) != 0
 
+## cmix
+
+based on RV bitmanip, covered by ternlog bitops
+
+```
+uint_xlen_t cmix(uint_xlen_t RA, uint_xlen_t RB, uint_xlen_t RC) {
+    return (RA & RB) | (RC & ~RB);
+}
+```
+
+
 # bitmask set
 
 based on RV bitmanip singlebit set, instruction format similar to shift
@@ -451,16 +462,6 @@ uint64_t gorc64(uint64_t RA, uint64_t RB)
 
 ```
 
-# cmix
-
-based on RV bitmanip, covered by ternlog bitops
-
-```
-uint_xlen_t cmix(uint_xlen_t RA, uint_xlen_t RB, uint_xlen_t RC) {
-    return (RA & RB) | (RC & ~RB);
-}
-```
-
 # carryless mul
 
 based on RV bitmanip