radeonsi: fix a critical SI hang since PIPELINESTAT_START/STOP was added

For some reason unknown to me, SI hangs if the event is written after
CONTEXT_CONTROL.

diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 242c22c88af9868f8ebf88ba27ba904a3f2f7a1c..b621b55abd397cdd0aed1421299eacce77c938bd 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -155,7 +155,8 @@ void si_begin_new_cs(struct si_context *ctx)
                        SI_CONTEXT_INV_VMEM_L1 |
                        SI_CONTEXT_INV_GLOBAL_L2 |
                        SI_CONTEXT_INV_SMEM_L1 |
-                       SI_CONTEXT_INV_ICACHE;
+                       SI_CONTEXT_INV_ICACHE |
+                       R600_CONTEXT_START_PIPELINE_STATS;
 
        /* set all valid group as dirty so they get reemited on
         * next draw command

diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 664506e85d4dd702771ef43e0850ef7c7574bde1..4d24fa398417c036799ede4bfa945bb0f0786511 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -3817,14 +3817,6 @@ static void si_init_config(struct si_context *sctx)
        si_pm4_cmd_add(pm4, 0x80000000);
        si_pm4_cmd_end(pm4, false);
 
-       /* This enables pipeline stat & streamout queries.
-        * They are only disabled by blits.
-        */
-       si_pm4_cmd_begin(pm4, PKT3_EVENT_WRITE);
-       si_pm4_cmd_add(pm4, EVENT_TYPE(V_028A90_PIPELINESTAT_START) |
-                           EVENT_INDEX(0));
-       si_pm4_cmd_end(pm4, false);
-
        si_pm4_set_reg(pm4, R_028A18_VGT_HOS_MAX_TESS_LEVEL, fui(64));
        si_pm4_set_reg(pm4, R_028A1C_VGT_HOS_MIN_TESS_LEVEL, fui(0));