(no commit message)

diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn
index a164c8b65bc562bf23f197b6b2f325994bf5ef0d..d16fe47e87be147881829377356b17472671532f 100644 (file)
--- a/openpower/sv/int_fp_mv.mdwn
+++ b/openpower/sv/int_fp_mv.mdwn
@@ -79,7 +79,7 @@ work on *both* Fixed *and* Floating Point operands and results.
  The interactions with SVP64
 are explained in the  [[int_fp_mv/appendix]]
 
-## FPR to GPR moves
+# FPR to GPR moves
 
 * `fmvtg RT, FRA`
 * `fmvtg. RT, FRA`
@@ -101,7 +101,7 @@ and therefore has the exact same exception and flags behaviour of `frsp`
 Unlike `frsp` however, with RT being a GPR, Rc=1 follows
 standard *integer* behaviour, i.e. tests RT and sets CR0.
 
-## GPR to FPR moves
+# GPR to FPR moves
 
 `fmvfg FRT, RA`
 
@@ -130,7 +130,7 @@ FPRF is set to the class and sign of the result, except for Invalid Operation Ex
       FX OX UX XX VXSNAN
       CR1 (if Rc=1)
 
-## Float load immediate <a name="fmvis"></a>
+# Float load immediate <a name="fmvis"></a>
 
 This is like a variant of `fmvfg`
 
@@ -179,6 +179,64 @@ allowing clearing FPRs.
     fp32 = bf16 || [0]*16
     FRT = Single_to_Double(fp32)
 
+# Conversions
+
+Unlike the move instructions
+these instructions perform conversions between Integer and
+Floating Point. Truncation can therefore occur, as well
+as exceptions.
+
+Mode values:
+
+| Mode | `rounding_mode` | Semantics                        |
+|------|-----------------|----------------------------------|
+| 000  | from `FPSCR`    | [OpenPower semantics]            |
+| 001  | Truncate        | [OpenPower semantics]            |
+| 010  | from `FPSCR`    | [Java semantics]                 |
+| 011  | Truncate        | [Java semantics]                 |
+| 100  | from `FPSCR`    | [JavaScript semantics]           |
+| 101  | Truncate        | [JavaScript semantics]           |
+| rest | --              | illegal instruction trap for now |
+
+[OpenPower semantics]: #fp-to-int-openpower-conversion-semantics
+[Java semantics]: #fp-to-int-java-conversion-semantics
+[JavaScript semantics]: #fp-to-int-javascript-conversion-semantics
+
+## GPR to FPR conversions
+
+**Format**
+
+|  0-5   | 6-10 | 11-15  | 16-25 | 26-30 | 31 | Form |
+|--------|------|--------|-------|-------|----|------|
+|  Major | FRT  | //Mode | RA    | XO    | Rc |X-Form|
+
+All of the following GPR to FPR conversions use the rounding mode from `FPSCR`.
+
+* `fcvtfgw FRT, RA`
+  Convert from 32-bit signed integer in the GPR `RA` to 64-bit float in 
+  `FRT`.
+* `fcvtfgws FRT, RA`
+  Convert from 32-bit signed integer in the GPR `RA` to 32-bit float in 
+  `FRT`.
+* `fcvtfguw FRT, RA`
+  Convert from 32-bit unsigned integer in the GPR `RA` to 64-bit float in 
+  `FRT`.
+* `fcvtfguws FRT, RA`
+  Convert from 32-bit unsigned integer in the GPR `RA` to 32-bit float in 
+  `FRT`.
+* `fcvtfgd FRT, RA`
+  Convert from 64-bit signed integer in the GPR `RA` to 64-bit float in 
+  `FRT`.
+* `fcvtfgds FRT, RA`
+  Convert from 64-bit signed integer in the GPR `RA` to 32-bit float in 
+  `FRT`.
+* `fcvtfgud FRT, RA`
+  Convert from 64-bit unsigned integer in the GPR `RA` to 64-bit float in 
+  `FRT`.
+* `fcvtfguds FRT, RA`
+  Convert from 64-bit unsigned integer in the GPR `RA` to 32-bit float in 
+  `FRT`.
+
 ## FPR to GPR (Integer) conversions
 
 <div id="fpr-to-gpr-conversion-mode"></div>
@@ -236,23 +294,6 @@ This instruction is present in ARM assembler as FJCVTZS
 |  0-5   | 6-10 | 11-15  | 16-25 | 26-30 | 31 | Form |
 |--------|------|--------|-------|-------|----|------|
 |  Major | RT   | //Mode | FRA   | XO    | Rc |X-Form|
-|  Major | FRT  | //Mode | RA    | XO    | Rc |X-Form|
-
-Mode values:
-
-| Mode | `rounding_mode` | Semantics                        |
-|------|-----------------|----------------------------------|
-| 000  | from `FPSCR`    | [OpenPower semantics]            |
-| 001  | Truncate        | [OpenPower semantics]            |
-| 010  | from `FPSCR`    | [Java semantics]                 |
-| 011  | Truncate        | [Java semantics]                 |
-| 100  | from `FPSCR`    | [JavaScript semantics]           |
-| 101  | Truncate        | [JavaScript semantics]           |
-| rest | --              | illegal instruction trap for now |
-
-[OpenPower semantics]: #fp-to-int-openpower-conversion-semantics
-[Java semantics]: #fp-to-int-java-conversion-semantics
-[JavaScript semantics]: #fp-to-int-javascript-conversion-semantics
 
 **Instructions**
 
@@ -283,36 +324,7 @@ Mode values:
 
 [mode `Mode`]: #fpr-to-gpr-conversion-mode
 
-## GPR to FPR conversions
-
-All of the following GPR to FPR conversions use the rounding mode from `FPSCR`.
-
-* `fcvtfgw FRT, RA`
-  Convert from 32-bit signed integer in the GPR `RA` to 64-bit float in 
-  `FRT`.
-* `fcvtfgws FRT, RA`
-  Convert from 32-bit signed integer in the GPR `RA` to 32-bit float in 
-  `FRT`.
-* `fcvtfguw FRT, RA`
-  Convert from 32-bit unsigned integer in the GPR `RA` to 64-bit float in 
-  `FRT`.
-* `fcvtfguws FRT, RA`
-  Convert from 32-bit unsigned integer in the GPR `RA` to 32-bit float in 
-  `FRT`.
-* `fcvtfgd FRT, RA`
-  Convert from 64-bit signed integer in the GPR `RA` to 64-bit float in 
-  `FRT`.
-* `fcvtfgds FRT, RA`
-  Convert from 64-bit signed integer in the GPR `RA` to 32-bit float in 
-  `FRT`.
-* `fcvtfgud FRT, RA`
-  Convert from 64-bit unsigned integer in the GPR `RA` to 64-bit float in 
-  `FRT`.
-* `fcvtfguds FRT, RA`
-  Convert from 64-bit unsigned integer in the GPR `RA` to 32-bit float in 
-  `FRT`.
-
-# FP to Integer Conversion Pseudo-code
+## FP to Integer Conversion Pseudo-code
 
 Key for pseudo-code: