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arch-power: Add bit permute instructions
author
Sandipan Das
<sandipan@linux.ibm.com>
Sat, 6 Feb 2021 11:51:34 +0000
(17:21 +0530)
committer
Sandipan Das
<sandipan@linux.ibm.com>
Mon, 15 Feb 2021 08:32:38 +0000
(14:02 +0530)
This adds the following instructions.
* Bit Permute Doubleword (bpermd)
Change-Id: Iab3cc6729b9d59c95e29b4f1d3e2c0eb48fde917
Signed-off-by: Sandipan Das <sandipan@linux.ibm.com>
src/arch/power/isa/decoder.isa
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diff --git
a/src/arch/power/isa/decoder.isa
b/src/arch/power/isa/decoder.isa
index 4482f2a1fea2953175b810c9c57eec4f37eaff7e..908ba3c26cf38fb5ada7ba0badd3c2ae824f89f3 100644
(file)
--- a/
src/arch/power/isa/decoder.isa
+++ b/
src/arch/power/isa/decoder.isa
@@
-571,6
+571,19
@@
decode PO default Unknown::unknown() {
Ra = res;
}});
+ 252: bpermd({{
+ uint64_t res = 0;
+ for (int i = 0; i < 8; ++i) {
+ int index = (Rs >> (i * 8)) & 0xff;
+ if (index < 64) {
+ if (Rb & (1ULL << (63 - index))) {
+ res |= 1 << i;
+ }
+ }
+ }
+ Ra = res;
+ }});
+
24: slw({{
if (Rb & 0x20) {
Ra = 0;