arch: TheISA shouldn't really ever be used in the arch directory.

We should always refer to the specific ISA in that arch directory.
This is especially necessary if we're ever going to make it to the
point where we actually have heterogeneous systems.

diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 83900349e9220337bf1a801282161dc238bfe26f..45d2ff5a538a133bff060b0925012119383a5535 100644 (file)
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -383,10 +383,10 @@ AlphaISA::MiscRegFile::setIpr(int idx, uint64_t val, ThreadContext *tc)
 #if FULL_SYSTEM
         if (val & 0x18) {
             if (tc->getKernelStats())
-                tc->getKernelStats()->mode(TheISA::Kernel::user, tc);
+                tc->getKernelStats()->mode(AlphaISA::Kernel::user, tc);
         } else {
             if (tc->getKernelStats())
-                tc->getKernelStats()->mode(TheISA::Kernel::kernel, tc);
+                tc->getKernelStats()->mode(AlphaISA::Kernel::kernel, tc);
         }
 #endif
 

diff --git a/src/arch/alpha/idle_event.cc b/src/arch/alpha/idle_event.cc
index f0f1eab7a2e24509ab32283743faa4f59be9740a..d3807a48d773f70834ad3fc3c2e1dcf537e43cb4 100644 (file)
--- a/src/arch/alpha/idle_event.cc
+++ b/src/arch/alpha/idle_event.cc
@@ -33,7 +33,7 @@
 #include "arch/alpha/kernel_stats.hh"
 #include "cpu/thread_context.hh"
 
-using namespace TheISA;
+using namespace AlphaISA;
 
 void
 IdleStartEvent::process(ThreadContext *tc)

diff --git a/src/arch/alpha/interrupts.hh b/src/arch/alpha/interrupts.hh
index 009b416376edef90491e937b0b7f8df0e003c660..1d8ba736fee52c48c8999ca36ad67c3c83138d63 100644 (file)
--- a/src/arch/alpha/interrupts.hh
+++ b/src/arch/alpha/interrupts.hh
@@ -78,7 +78,7 @@ class Interrupts
     {
         DPRINTF(Interrupt, "Interrupt %d:%d cleared\n", int_num, index);
 
-        if (int_num < 0 || int_num >= TheISA::NumInterruptLevels)
+        if (int_num < 0 || int_num >= AlphaISA::NumInterruptLevels)
             panic("int_num out of bounds\n");
 
         if (index < 0 || index >= (int)sizeof(uint64_t) * 8)

diff --git a/src/arch/alpha/linux/threadinfo.hh b/src/arch/alpha/linux/threadinfo.hh
index b0c8284be5189ef0fec4656dbf0032ff697407ad..3ec1aa0982774b0a777db1f99b26e7101b7ef27d 100644 (file)
--- a/src/arch/alpha/linux/threadinfo.hh
+++ b/src/arch/alpha/linux/threadinfo.hh
@@ -55,7 +55,7 @@ class ThreadInfo
 
         CopyOut(tc, &data, addr, sizeof(T));
 
-        data = TheISA::gtoh(data);
+        data = AlphaISA::gtoh(data);
 
         return true;
     }
@@ -76,7 +76,7 @@ class ThreadInfo
         Addr sp;
 
         if (!addr)
-            addr = tc->readMiscRegNoEffect(TheISA::IPR_PALtemp23);
+            addr = tc->readMiscRegNoEffect(AlphaISA::IPR_PALtemp23);
 
         FunctionalPort *p = tc->getPhysPort();
         p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));

diff --git a/src/arch/alpha/regfile.cc b/src/arch/alpha/regfile.cc
index 2653310d779c8d1c5bd9466db48172bd4ef39c98..3faa189ca11aad73562e388d42f653e64035346e 100644 (file)
--- a/src/arch/alpha/regfile.cc
+++ b/src/arch/alpha/regfile.cc
@@ -70,7 +70,7 @@ namespace AlphaISA
         }
 
         // Then loop through the floating point registers.
-        for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
+        for (int i = 0; i < AlphaISA::NumFloatRegs; ++i) {
             dest->setFloatRegBits(i, src->readFloatRegBits(i));
         }
 

diff --git a/src/arch/alpha/remote_gdb.cc b/src/arch/alpha/remote_gdb.cc
index 8d70ebfa2fec4d6e44ba124c86cf85e964949edf..a40d06f18356b90c1e4eb5b1b1b5a98b89068e8e 100644 (file)
--- a/src/arch/alpha/remote_gdb.cc
+++ b/src/arch/alpha/remote_gdb.cc
@@ -140,7 +140,7 @@
 #include "sim/system.hh"
 
 using namespace std;
-using namespace TheISA;
+using namespace AlphaISA;
 
 RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
     : BaseRemoteGDB(_system, c, KGDB_NUMREGS)
@@ -161,12 +161,12 @@ RemoteGDB::acc(Addr va, size_t len)
 #else
     Addr last_va;
 
-    va = TheISA::TruncPage(va);
-    last_va = TheISA::RoundPage(va + len);
+    va = AlphaISA::TruncPage(va);
+    last_va = AlphaISA::RoundPage(va + len);
 
     do  {
-        if (TheISA::IsK0Seg(va)) {
-            if (va < (TheISA::K0SegBase + pmem->size())) {
+        if (AlphaISA::IsK0Seg(va)) {
+            if (va < (AlphaISA::K0SegBase + pmem->size())) {
                 DPRINTF(GDBAcc, "acc:   Mapping is valid  K0SEG <= "
                         "%#x < K0SEG + size\n", va);
                 return true;
@@ -188,12 +188,12 @@ RemoteGDB::acc(Addr va, size_t len)
             return true;
 
         Addr ptbr = context->readMiscRegNoEffect(AlphaISA::IPR_PALtemp20);
-        TheISA::PageTableEntry pte = TheISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
+        AlphaISA::PageTableEntry pte = AlphaISA::kernel_pte_lookup(context->getPhysPort(), ptbr, va);
         if (!pte.valid()) {
             DPRINTF(GDBAcc, "acc:   %#x pte is invalid\n", va);
             return false;
         }
-        va += TheISA::PageBytes;
+        va += AlphaISA::PageBytes;
     } while (va < last_va);
 
     DPRINTF(GDBAcc, "acc:   %#x mapping is valid\n", va);
@@ -215,17 +215,17 @@ RemoteGDB::getregs()
 
     // @todo: Currently this is very Alpha specific.
     if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
-        for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+        for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
             gdbregs.regs[i] = context->readIntReg(AlphaISA::reg_redir[i]);
         }
     } else {
-        for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+        for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
             gdbregs.regs[i] = context->readIntReg(i);
         }
     }
 
 #ifdef KGDB_FP_REGS
-    for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
+    for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) {
         gdbregs.regs[i + KGDB_REG_F0] = context->readFloatRegBits(i);
     }
 #endif
@@ -242,17 +242,17 @@ RemoteGDB::setregs()
 {
     // @todo: Currently this is very Alpha specific.
     if (AlphaISA::PcPAL(gdbregs.regs[KGDB_REG_PC])) {
-        for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+        for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
             context->setIntReg(AlphaISA::reg_redir[i], gdbregs.regs[i]);
         }
     } else {
-        for (int i = 0; i < TheISA::NumIntArchRegs; ++i) {
+        for (int i = 0; i < AlphaISA::NumIntArchRegs; ++i) {
             context->setIntReg(i, gdbregs.regs[i]);
         }
     }
 
 #ifdef KGDB_FP_REGS
-    for (int i = 0; i < TheISA::NumFloatArchRegs; ++i) {
+    for (int i = 0; i < AlphaISA::NumFloatArchRegs; ++i) {
         context->setFloatRegBits(i, gdbregs.regs[i + KGDB_REG_F0]);
     }
 #endif

diff --git a/src/arch/alpha/stacktrace.cc b/src/arch/alpha/stacktrace.cc
index 124949781646cc26e40984c1958fed93f64a2d9a..b2fa89cb8902c5d83f04e4d4a3f83df936c35c12 100644 (file)
--- a/src/arch/alpha/stacktrace.cc
+++ b/src/arch/alpha/stacktrace.cc
@@ -159,7 +159,7 @@ namespace AlphaISA
         }
 
         SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
-        Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
+        Addr ksp = tc->readIntReg(AlphaISA::StackPointerReg);
         Addr bottom = ksp & ~0x3fff;
         Addr addr;
 

diff --git a/src/arch/alpha/stacktrace.hh b/src/arch/alpha/stacktrace.hh
index 834abbc2f6eca9ceac7ad0ef742a0db403219293..c028afe2b62bce6bae0f4c718a70b88a0e8cade7 100644 (file)
--- a/src/arch/alpha/stacktrace.hh
+++ b/src/arch/alpha/stacktrace.hh
@@ -62,7 +62,7 @@ namespace AlphaISA
     class StackTrace
     {
       protected:
-        typedef TheISA::MachInst MachInst;
+        typedef AlphaISA::MachInst MachInst;
       private:
         ThreadContext *tc;
         std::vector<Addr> stack;

diff --git a/src/arch/alpha/tru64/process.cc b/src/arch/alpha/tru64/process.cc
index 5f448489e5abcd22a9efd79460253ba60b7e5794..455a245841bdbc3dd13319cef469d2eaf7038da4 100644 (file)
--- a/src/arch/alpha/tru64/process.cc
+++ b/src/arch/alpha/tru64/process.cc
@@ -166,7 +166,7 @@ SyscallReturn tableFunc(SyscallDesc *desc, int callnum, LiveProcess *process,
                         ThreadContext *tc)
 {
     using namespace std;
-    using namespace TheISA;
+    using namespace AlphaISA;
 
     int id = tc->getSyscallArg(0);      // table ID
     int index = tc->getSyscallArg(1);   // index into table

diff --git a/src/arch/mips/idle_event.cc b/src/arch/mips/idle_event.cc
index d1d4f7c6371e588d0f26e0e646db95fef770f1fe..0aea08834b2243403c6e34df97910fe1d19d28f9 100644 (file)
--- a/src/arch/mips/idle_event.cc
+++ b/src/arch/mips/idle_event.cc
@@ -34,7 +34,7 @@
 #include "arch/mips/kernel_stats.hh"
 #include "cpu/thread_context.hh"
 
-using namespace TheISA;
+using namespace MipsISA;
 
 void
 IdleStartEvent::process(ThreadContext *tc)

diff --git a/src/arch/mips/linux/threadinfo.hh b/src/arch/mips/linux/threadinfo.hh
index 25ee74dd3a9c33bca947fd9c3c9b33795cfaef4d..b0d0cd811eded41e1e11a77caed141015175300c 100644 (file)
--- a/src/arch/mips/linux/threadinfo.hh
+++ b/src/arch/mips/linux/threadinfo.hh
@@ -55,7 +55,7 @@ class ThreadInfo
 
         CopyOut(tc, &data, addr, sizeof(T));
 
-        data = TheISA::gtoh(data);
+        data = MipsISA::gtoh(data);
 
         return true;
     }
@@ -77,7 +77,7 @@ class ThreadInfo
         Addr sp;
 
         if (!addr)
-            addr = tc->readMiscRegNoEffect(0/*TheISA::IPR_PALtemp23*/);
+            addr = tc->readMiscRegNoEffect(0/*MipsISA::IPR_PALtemp23*/);
 
         FunctionalPort *p = tc->getPhysPort();
         p->readBlob(addr, (uint8_t *)&sp, sizeof(Addr));

diff --git a/src/arch/mips/regfile/misc_regfile.cc b/src/arch/mips/regfile/misc_regfile.cc
index b82a94103a1059caaf198abf16e1cad72a8d1604..e81f940f5522a474fd59baceb0618f612296c555 100755 (executable)
--- a/src/arch/mips/regfile/misc_regfile.cc
+++ b/src/arch/mips/regfile/misc_regfile.cc
@@ -186,7 +186,7 @@ MiscRegFile::reset(std::string core_name, unsigned num_threads,
             num_threads, num_vpes);
     cpu = _cpu;
 
-    TheISA::CoreSpecific &cp = cpu->coreParams;
+    MipsISA::CoreSpecific &cp = cpu->coreParams;
 
     // Do Default CP0 initialization HERE
 

diff --git a/src/arch/mips/stacktrace.cc b/src/arch/mips/stacktrace.cc
index 482d264e8d15e2296ac80e15d208ffddbab8ed43..04a9a0f18d57fd6d3f9f95e671cacd9920c41d5d 100644 (file)
--- a/src/arch/mips/stacktrace.cc
+++ b/src/arch/mips/stacktrace.cc
@@ -159,7 +159,7 @@ StackTrace::trace(ThreadContext *_tc, bool is_call)
 //     }
 
 //     SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
-//     Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
+//     Addr ksp = tc->readIntReg(MipsISA::StackPointerReg);
 //     Addr bottom = ksp & ~0x3fff;
 //     Addr addr;
 

diff --git a/src/arch/mips/stacktrace.hh b/src/arch/mips/stacktrace.hh
index e2424523fff0a30238c19fd1e19e689aeb7f748c..4c02cc86caf3d8b61443e2e6b12b3037c0f1021e 100644 (file)
--- a/src/arch/mips/stacktrace.hh
+++ b/src/arch/mips/stacktrace.hh
@@ -61,7 +61,7 @@ class ProcessInfo
 class StackTrace
 {
   protected:
-    typedef TheISA::MachInst MachInst;
+    typedef MipsISA::MachInst MachInst;
   private:
     ThreadContext *tc;
     std::vector<Addr> stack;

diff --git a/src/arch/sparc/process.cc b/src/arch/sparc/process.cc
index 6e490e05eb8ac6919e098e28f9b5fa7370fde73f..a8fda04eb1834a00ddae6c557f032e9ca6acb9d2 100644 (file)
--- a/src/arch/sparc/process.cc
+++ b/src/arch/sparc/process.cc
@@ -354,7 +354,7 @@ SparcLiveProcess::argsInit(int pageSize)
 
     // figure out argc
     IntType argc = argv.size();
-    IntType guestArgc = TheISA::htog(argc);
+    IntType guestArgc = SparcISA::htog(argc);
 
     //Write out the sentry void *
     uint64_t sentry_NULL = 0;

diff --git a/src/arch/sparc/regfile.cc b/src/arch/sparc/regfile.cc
index d6be52424e291d089bd04fc7a0d401dc7e5ed3e1..76516daca223213e9bb0db2bb8feeb8332686c36 100644 (file)
--- a/src/arch/sparc/regfile.cc
+++ b/src/arch/sparc/regfile.cc
@@ -366,12 +366,12 @@ void SparcISA::copyMiscRegs(ThreadContext *src, ThreadContext *dest)
 void SparcISA::copyRegs(ThreadContext *src, ThreadContext *dest)
 {
     // First loop through the integer registers.
-    for (int i = 0; i < TheISA::NumIntRegs; ++i) {
+    for (int i = 0; i < SparcISA::NumIntRegs; ++i) {
         dest->setIntReg(i, src->readIntReg(i));
     }
 
     // Then loop through the floating point registers.
-    for (int i = 0; i < TheISA::NumFloatRegs; ++i) {
+    for (int i = 0; i < SparcISA::NumFloatRegs; ++i) {
         dest->setFloatRegBits(i, src->readFloatRegBits(i));
     }
 

diff --git a/src/arch/sparc/remote_gdb.cc b/src/arch/sparc/remote_gdb.cc
index ef30bd80809bfa104c5c3da519ce57a033b19d31..615c5b55168da8d6424b2bc4394fb7da892e64cb 100644 (file)
--- a/src/arch/sparc/remote_gdb.cc
+++ b/src/arch/sparc/remote_gdb.cc
@@ -137,7 +137,7 @@
 #include "sim/system.hh"
 
 using namespace std;
-using namespace TheISA;
+using namespace SparcISA;
 
 RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
     : BaseRemoteGDB(_system, c, NumGDBRegs), nextBkpt(0)

diff --git a/src/arch/sparc/stacktrace.cc b/src/arch/sparc/stacktrace.cc
index 8ec1d36c88e18d7bc1c5f5cd2a9e7f37be374faa..3ab0edb57aeb0f776c3d2e31874e6227bb2a4927 100644 (file)
--- a/src/arch/sparc/stacktrace.cc
+++ b/src/arch/sparc/stacktrace.cc
@@ -159,7 +159,7 @@ namespace SparcISA
         }
 
         SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
-        Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
+        Addr ksp = tc->readIntReg(SparcISA::StackPointerReg);
         Addr bottom = ksp & ~0x3fff;
         Addr addr;
 

diff --git a/src/arch/sparc/stacktrace.hh b/src/arch/sparc/stacktrace.hh
index 4bc5d779b16319934e5ed35b6a22eb4636c88f34..929990fcbea9f8b9ee7e7a544d1b240c5082e57f 100644 (file)
--- a/src/arch/sparc/stacktrace.hh
+++ b/src/arch/sparc/stacktrace.hh
@@ -61,7 +61,7 @@ namespace SparcISA
     class StackTrace
     {
       protected:
-        typedef TheISA::MachInst MachInst;
+        typedef SparcISA::MachInst MachInst;
       private:
         ThreadContext *tc;
         std::vector<Addr> stack;

diff --git a/src/arch/x86/process.cc b/src/arch/x86/process.cc
index 76f0b5d04c14268a78be45ad455a25be6788e8c5..b62efd3cdd7c58eaf52b3c790b5213909562ee89 100644 (file)
--- a/src/arch/x86/process.cc
+++ b/src/arch/x86/process.cc
@@ -105,8 +105,8 @@ using namespace X86ISA;
 
 M5_64_auxv_t::M5_64_auxv_t(int64_t type, int64_t val)
 {
-    a_type = TheISA::htog(type);
-    a_val = TheISA::htog(val);
+    a_type = X86ISA::htog(type);
+    a_val = X86ISA::htog(val);
 }
 
 X86LiveProcess::X86LiveProcess(LiveProcessParams * params,
@@ -424,7 +424,7 @@ X86LiveProcess::argsInit(int intSize, int pageSize)
 
     // figure out argc
     uint64_t argc = argv.size();
-    uint64_t guestArgc = TheISA::htog(argc);
+    uint64_t guestArgc = X86ISA::htog(argc);
 
     //Write out the sentry void *
     uint64_t sentry_NULL = 0;

diff --git a/src/arch/x86/remote_gdb.cc b/src/arch/x86/remote_gdb.cc
index 3a024e0879673c4180d297f9ca52e682b4ad6032..c416042c89fda8b0abf76ba23d02845943570a21 100644 (file)
--- a/src/arch/x86/remote_gdb.cc
+++ b/src/arch/x86/remote_gdb.cc
@@ -157,7 +157,7 @@
 #include "cpu/thread_context.hh"
 
 using namespace std;
-using namespace TheISA;
+using namespace X86ISA;
 
 RemoteGDB::RemoteGDB(System *_system, ThreadContext *c)
     : BaseRemoteGDB(_system, c, NumGDBRegs)