rename SV CSRs, to use CSR_UESVSTATE etc.

diff --git a/riscv/encoding.h b/riscv/encoding.h
index 959bc7f378cc52be1de8ebac038cc0603262199e..752666b4ff149b88bcea2eace7791ccf1766f5d0 100644 (file)
--- a/riscv/encoding.h
+++ b/riscv/encoding.h
@@ -902,19 +902,14 @@
 #define CSR_SVPREDCFG5 0x4cd
 #define CSR_SVPREDCFG6 0x4ce
 #define CSR_SVPREDCFG7 0x4cf
-#define CSR_MSVVL 0x4d0
-#define CSR_MSVMVL 0x4d1
-#define CSR_MSVSTATE 0x4d2
-#define CSR_MSVSUBVL 0x4d4
-#define CSR_SSVVL 0x4e0
-#define CSR_SSVMVL 0x4e1
-#define CSR_SSVSTATE 0x4e2
-#define CSR_SSVSUBVL 0x4e4
-#define CSR_USVVL 0x4f0
-#define CSR_USVMVL 0x4f1
-#define CSR_USVSTATE 0x4f2
-#define CSR_USVCFG 0x4f3
-#define CSR_USVSUBVL 0x4f4
+#define CSR_MESVSTATE 0x4d0
+#define CSR_SESVSTATE 0x4d1
+#define CSR_UESVSTATE 0x4d2
+#define CSR_SV_VL 0x4f0
+#define CSR_SV_MVL 0x4f1
+#define CSR_SV_STATE 0x4f2
+#define CSR_SV_CFG 0x4f3
+#define CSR_SV_SUBVL 0x4f4
 #define CSR_UREMAP 0x4f7
 #define CSR_USHAPE0 0x4f8
 #define CSR_USHAPE1 0x4f9
@@ -1267,19 +1262,13 @@ DECLARE_INSN(custom3_rd_rs1, MATCH_CUSTOM3_RD_RS1, MASK_CUSTOM3_RD_RS1)
 DECLARE_INSN(custom3_rd_rs1_rs2, MATCH_CUSTOM3_RD_RS1_RS2, MASK_CUSTOM3_RD_RS1_RS2)
 #endif
 #ifdef DECLARE_CSR
-DECLARE_CSR(msvvl, CSR_MSVVL)
-DECLARE_CSR(msvmvl, CSR_MSVMVL)
-DECLARE_CSR(msvsubvl, CSR_MSVSUBVL)
-DECLARE_CSR(msvstate, CSR_MSVSTATE)
-DECLARE_CSR(ssvvl, CSR_SSVVL)
-DECLARE_CSR(ssvmvl, CSR_SSVMVL)
-DECLARE_CSR(ssvsubvl, CSR_SSVSUBVL)
-DECLARE_CSR(ssvstate, CSR_SSVSTATE)
-DECLARE_CSR(usvcfg, CSR_USVCFG)
-DECLARE_CSR(usvstate, CSR_USVSTATE)
-DECLARE_CSR(usvvl, CSR_USVVL)
-DECLARE_CSR(usvmvl, CSR_USVMVL)
-DECLARE_CSR(usvsubvl, CSR_USVSUBVL)
+DECLARE_CSR(svvl, CSR_SV_VL)
+DECLARE_CSR(svmvl, CSR_SV_MVL)
+DECLARE_CSR(svsubvl, CSR_SV_SUBVL)
+DECLARE_CSR(svcfg, CSR_SV_CFG)
+DECLARE_CSR(mesvstate, CSR_MESVSTATE)
+DECLARE_CSR(sesvstate, CSR_SESVSTATE)
+DECLARE_CSR(uesvstate, CSR_UESVSTATE)
 DECLARE_CSR(svregtop, CSR_SVREGTOP)
 DECLARE_CSR(svregbot, CSR_SVREGBOT)
 DECLARE_CSR(svpredcfg0, CSR_SVPREDCFG0)

diff --git a/riscv/processor.cc b/riscv/processor.cc
index 6338ada32ff3052499e6f88098c21306cb2a5edf..0a9d9f9b3ba3cd4252ffd1710ca3c3981affa1c6 100644 (file)
--- a/riscv/processor.cc
+++ b/riscv/processor.cc
@@ -504,18 +504,18 @@ reg_t processor_t::set_csr(int which, reg_t val, bool imm_mode)
   switch (which)
   {
 #ifdef SPIKE_SIMPLEV
-    case CSR_USVMVL:
+    case CSR_SV_MVL:
       state.sv().mvl = std::min(val+1, (uint64_t)64); // limited to XLEN width
       old_val = state.sv().mvl - 1;
       // TODO XXX throw exception if val == 0
       fprintf(stderr, "set MVL %lx\n", state.sv().mvl);
       break;
-    case CSR_USVSTATE:
+    case CSR_SV_STATE:
     {
       // bits 0-5: mvl - 6-11: vl - 12-17: srcoffs - 18-23: destoffs
-      set_csr(CSR_USVMVL, get_field(val, SV_STATE_VL )+1);
-      set_csr(CSR_USVVL , get_field(val, SV_STATE_MVL)+1);
-      set_csr(CSR_USVSUBVL , get_field(val, SV_STATE_SUBVL)+1);
+      set_csr(CSR_SV_MVL, get_field(val, SV_STATE_VL )+1);
+      set_csr(CSR_SV_VL , get_field(val, SV_STATE_MVL)+1);
+      set_csr(CSR_SV_SUBVL , get_field(val, SV_STATE_SUBVL)+1);
       // decode (and limit) src/dest VL offsets
       reg_t srcoffs = get_field(val, SV_STATE_SRCOFFS);
       reg_t destoffs = get_field(val, SV_STATE_DESTOFFS);
@@ -531,7 +531,7 @@ reg_t processor_t::set_csr(int which, reg_t val, bool imm_mode)
       //set_csr(CSR_USVCFG, state_bank | (state_size << 3));
       break;
     }
-    case CSR_USVCFG:
+    case CSR_SV_CFG:
     {
       int old_bank = state.sv().state_bank;
       int old_size = state.sv().state_size;
@@ -547,13 +547,13 @@ reg_t processor_t::set_csr(int which, reg_t val, bool imm_mode)
       }
       break;
     }
-    case CSR_USVSUBVL:
+    case CSR_SV_SUBVL:
       state.sv().subvl = std::max(1, std::min(4, (int)val));
       old_val = state.sv().subvl;
       // TODO XXX throw exception if val attempted to be set == 0
       fprintf(stderr, "set SUBVL %lx\n", state.sv().subvl);
       break;
-    case CSR_USVVL:
+    case CSR_SV_VL:
       state.sv().vl = std::min(state.sv().mvl, val + 1);
       old_val = state.sv().mvl - 1;
       // TODO XXX throw exception if val == 0
@@ -891,18 +891,18 @@ reg_t processor_t::get_csr(int which)
   switch (which)
   {
 #ifdef SPIKE_SIMPLEV
-    case CSR_USVVL:
+    case CSR_SV_VL:
       return state.sv().vl;
-    case CSR_USVCFG:
+    case CSR_SV_CFG:
       return (state.sv().state_bank)      | (state.sv().state_size<<3);
-    case CSR_USVSTATE:
+    case CSR_SV_STATE:
       return (state.sv().vl-1)            | ((state.sv().mvl-1)<<6) |
              (state.sv().srcoffs<<12)     | (state.sv().destoffs<<18) |
              ((state.sv().subvl-1)<<24)   |
              (state.sv().ssvoffs<<26)     | (state.sv().dsvoffs<<28);
-    case CSR_USVMVL:
+    case CSR_SV_MVL:
       return state.sv().mvl;
-    case CSR_USVSUBVL:
+    case CSR_SV_SUBVL:
       return state.sv().subvl;
     case CSR_SVREGTOP:
     case CSR_SVREGBOT: