dev-arm: Add GITS_PIDR2 register to the ITS memory map
authorGiacomo Travaglini <giacomo.travaglini@arm.com>
Wed, 14 Aug 2019 16:50:06 +0000 (17:50 +0100)
committerGiacomo Travaglini <giacomo.travaglini@arm.com>
Tue, 20 Aug 2019 12:22:51 +0000 (12:22 +0000)
The GITS Peripheral Identification Register #2 bits assignments are the
same as those for GICD_PIDR2.

Change-Id: I235008a383e08dd557d899cb3aa18202ef943f8b
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20254
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
src/dev/arm/gic_v3_distributor.hh
src/dev/arm/gic_v3_its.cc
src/dev/arm/gic_v3_its.hh

index 880c577d782c81676ab90dc8b4aa2d0b514028b4..0cf8d378c8f81760e8ab12b675eddf96fda2aca3 100644 (file)
@@ -53,6 +53,7 @@ class Gicv3Distributor : public Serializable
 
     friend class Gicv3Redistributor;
     friend class Gicv3CPUInterface;
+    friend class Gicv3Its;
 
   protected:
 
index f3fa0a50e10788062ac95b1121ae2437db39825d..26c123c033ad7eb192994b46391018fc94c3dc44 100644 (file)
@@ -834,6 +834,10 @@ Gicv3Its::read(PacketPtr pkt)
         value = gitsCreadr;
         break;
 
+      case GITS_PIDR2:
+        value = gic->getDistributor()->gicdPidr2;
+        break;
+
       case GITS_TRANSLATER:
         value = gitsTranslater;
         break;
index aa0b8c805e10b9e7b5e56bced89e08b751cc8a58..e09f712be38a665f92a6b66bc0bf46f1b54db748 100644 (file)
@@ -123,6 +123,7 @@ class Gicv3Its : public BasicPioDevice
         GITS_CBASER  = itsControl + 0x0080,
         GITS_CWRITER = itsControl + 0x0088,
         GITS_CREADR  = itsControl + 0x0090,
+        GITS_PIDR2 = itsControl + 0xffe8,
 
         // Translation frame
         GITS_TRANSLATER = itsTranslate + 0x0040