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simplemap: Fix $dffsre mapping.
author
Marcelina Kościelnicka
<mwk@0x04.net>
Tue, 23 Jun 2020 21:16:43 +0000
(23:16 +0200)
committer
Marcelina Kościelnicka
<mwk@0x04.net>
Tue, 23 Jun 2020 21:16:43 +0000
(23:16 +0200)
passes/techmap/simplemap.cc
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diff --git
a/passes/techmap/simplemap.cc
b/passes/techmap/simplemap.cc
index c8388e2d7f35608f1e4031eb0a926398e2c38bc6..b9d337da4559dc91dd4758d4247df18349e85fa0 100644
(file)
--- a/
passes/techmap/simplemap.cc
+++ b/
passes/techmap/simplemap.cc
@@
-489,7
+489,7
@@
void simplemap_dffsre(RTLIL::Module *module, RTLIL::Cell *cell)
RTLIL::SigSpec sig_d = cell->getPort(ID::D);
RTLIL::SigSpec sig_q = cell->getPort(ID::Q);
- IdString gate_type = stringf("$_DFFSR_%c%c%c%c_", clk_pol, set_pol, clr_pol, en_pol);
+ IdString gate_type = stringf("$_DFFSR
E
_%c%c%c%c_", clk_pol, set_pol, clr_pol, en_pol);
for (int i = 0; i < width; i++) {
RTLIL::Cell *gate = module->addCell(NEW_ID, gate_type);