(no commit message)

diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn
index 80f7044217a895454c184e2df0f73f844f6176a7..a26420e47d48ef6d88685b0b8eee902633b451b8 100644 (file)
--- a/openpower/sv/rfc/ls001.mdwn
+++ b/openpower/sv/rfc/ls001.mdwn
@@ -56,9 +56,7 @@ Simple-V has been subdivided into levels akin to the Power ISA Compliancy Levels
 For now Let us call them "SV Compliancy Levels" to distinguish the two.  The reason for
 the SV Compliancy Levels is the same as for the Power ISA Compliancy Levels (SFFS, SFS):
 to not overburden implementors with features that they do not need.
-
 *There is no dependence between the two types of Compliancy Levels*
-
 The resources below therefore are not all required for all SV Compliancy Levels but
 they are all required to be reserved.
 
@@ -112,8 +110,7 @@ even for Multi-Issue microarchitectures.
 * 75% of one Major Opcode (equivalent to the rest of EXT017)
 * Five 6-bit operations.
 
-No further opcode space *for Simple-V* is envisaged to be required for at least
-the next decade.
+No further opcode space *for Simple-V* is envisaged to be required for at least the next decade (including if added on VSX)
 
 **SPRs**