Add alternative_mask to ira_implicitly_set_insn_hard_regs

Since ira_implicitly_set_insn_hard_regs may be called outside of
ira-lives.c, it can't use the local variable, preferred_alternatives.
This patch adds an alternative_mask argument to
ira_implicitly_set_insn_hard_regs.

gcc/

	PR rtl-optimization/67029
	* ira-color.c: Include "recog.h" before including "ira-int.h".
	* target-globals.c: Likewise.
	* ira-lives.c (ira_implicitly_set_insn_hard_regs): Add an
	adds an alternative_mask argument and use it instead of
	preferred_alternatives.
	* ira.h (ira_implicitly_set_insn_hard_regs): Moved to ...
	* ira-int.h (ira_implicitly_set_insn_hard_regs): Here.
	* sched-deps.c: Include "ira-int.h" after including "ira.h".
	(sched_analyze_insn): Update call to
	ira_implicitly_set_insn_hard_regs.
	* sel-sched.c: Include "ira-int.h" after including "ira.h".
	(implicit_clobber_conflict_p): Update call to
	ira_implicitly_set_insn_hard_regs.

gcc/testsuite/

	PR rtl-optimization/67029
	* gcc.dg/pr67029.c: New test.

From-SVN: r226724

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 64cec7b9c700eb40d42bef5cea7f442dd4694455..a92a707db321eb73260a3d012ecd88b5a6ec3dfd 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,20 @@
+2015-08-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR rtl-optimization/67029
+       * ira-color.c: Include "recog.h" before including "ira-int.h".
+       * target-globals.c: Likewise.
+       * ira-lives.c (ira_implicitly_set_insn_hard_regs): Add an
+       adds an alternative_mask argument and use it instead of
+       preferred_alternatives.
+       * ira.h (ira_implicitly_set_insn_hard_regs): Moved to ...
+       * ira-int.h (ira_implicitly_set_insn_hard_regs): Here.
+       * sched-deps.c: Include "ira-int.h" after including "ira.h".
+       (sched_analyze_insn): Update call to
+       ira_implicitly_set_insn_hard_regs.
+       * sel-sched.c: Include "ira-int.h" after including "ira.h".
+       (implicit_clobber_conflict_p): Update call to
+       ira_implicitly_set_insn_hard_regs.
+
 2015-08-06  Uros Bizjak  <ubizjak@gmail.com>
 
        * Makefile.in (.INTERMEDIATE): Add gpl.pod.

diff --git a/gcc/ira-color.c b/gcc/ira-color.c
index 74d2c2ed6081c42c6dd8e56bbd121abbf7f26099..c8f33ed8d06460443d76a47d70395f1988fb8c8d 100644 (file)
--- a/gcc/ira-color.c
+++ b/gcc/ira-color.c
@@ -46,6 +46,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "cfgloop.h"
 #include "ira.h"
 #include "alloc-pool.h"
+#include "recog.h"
 #include "ira-int.h"
 
 typedef struct allocno_hard_regs *allocno_hard_regs_t;

diff --git a/gcc/ira-int.h b/gcc/ira-int.h
index a7c0f40b53bc0cebd6f7647f527e0a221d78aaa6..a993dfcb81e1dad123dbe70672b97fe8471c51fb 100644 (file)
--- a/gcc/ira-int.h
+++ b/gcc/ira-int.h
@@ -1041,6 +1041,8 @@ extern void ira_debug_live_ranges (void);
 extern void ira_create_allocno_live_ranges (void);
 extern void ira_compress_allocno_live_ranges (void);
 extern void ira_finish_allocno_live_ranges (void);
+extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *,
+                                              alternative_mask);
 
 /* ira-conflicts.c */
 extern void ira_debug_conflicts (bool);

diff --git a/gcc/ira-lives.c b/gcc/ira-lives.c
index 1cb05c2b6db66f3099a47025b4af54fdca0ca1f3..011d5136492dd3981fed7b19b673437a40d0fa96 100644 (file)
--- a/gcc/ira-lives.c
+++ b/gcc/ira-lives.c
@@ -831,7 +831,8 @@ single_reg_operand_class (int op_num)
    might be used by insn reloads because the constraints are too
    strict.  */
 void
-ira_implicitly_set_insn_hard_regs (HARD_REG_SET *set)
+ira_implicitly_set_insn_hard_regs (HARD_REG_SET *set,
+                                  alternative_mask preferred)
 {
   int i, c, regno = 0;
   enum reg_class cl;
@@ -854,7 +855,6 @@ ira_implicitly_set_insn_hard_regs (HARD_REG_SET *set)
          mode = (GET_CODE (op) == SCRATCH
                  ? GET_MODE (op) : PSEUDO_REGNO_MODE (regno));
          cl = NO_REGS;
-         alternative_mask preferred = preferred_alternatives;
          for (; (c = *p); p += CONSTRAINT_LEN (c, p))
            if (c == '#')
              preferred &= ~ALTERNATIVE_BIT (0);

diff --git a/gcc/ira.h b/gcc/ira.h
index 504b5e6a93bc1ca839be755e4d3655638dea4c86..881674b37f2954128fe546c333ce7929d86ae904 100644 (file)
--- a/gcc/ira.h
+++ b/gcc/ira.h
@@ -192,7 +192,6 @@ extern void ira_init (void);
 extern void ira_setup_eliminable_regset (void);
 extern rtx ira_eliminate_regs (rtx, machine_mode);
 extern void ira_set_pseudo_classes (bool, FILE *);
-extern void ira_implicitly_set_insn_hard_regs (HARD_REG_SET *);
 extern void ira_expand_reg_equiv (void);
 extern void ira_update_equiv_info_by_shuffle_insn (int, int, rtx_insn *);
 

diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c
index 3ac66e8eeba107df19a06effd8bf85c770a5c3ee..0a8dcb00af94e2550d64a5f66297046c8d3994b0 100644 (file)
--- a/gcc/sched-deps.c
+++ b/gcc/sched-deps.c
@@ -43,6 +43,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "alloc-pool.h"
 #include "cselib.h"
 #include "ira.h"
+#include "ira-int.h"
 #include "target.h"
 
 #ifdef INSN_SCHEDULING
@@ -2891,7 +2892,8 @@ sched_analyze_insn (struct deps_desc *deps, rtx x, rtx_insn *insn)
 
       extract_insn (insn);
       preprocess_constraints (insn);
-      ira_implicitly_set_insn_hard_regs (&temp);
+      alternative_mask prefrred = get_preferred_alternatives (insn);
+      ira_implicitly_set_insn_hard_regs (&temp, prefrred);
       AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
       IOR_HARD_REG_SET (implicit_reg_pending_clobbers, temp);
     }

diff --git a/gcc/sel-sched.c b/gcc/sel-sched.c
index ec2ab05c3b320a702dc68eef94267045ab53b9f6..18604444b15f2c37db87faca340fbaeeb71e5d6c 100644 (file)
--- a/gcc/sel-sched.c
+++ b/gcc/sel-sched.c
@@ -41,6 +41,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "rtlhooks-def.h"
 #include "emit-rtl.h"
 #include "ira.h"
+#include "ira-int.h"
 #include "rtl-iter.h"
 
 #ifdef INSN_SCHEDULING
@@ -2104,7 +2105,8 @@ implicit_clobber_conflict_p (insn_t through_insn, expr_t expr)
   /* Calculate implicit clobbers.  */
   extract_insn (insn);
   preprocess_constraints (insn);
-  ira_implicitly_set_insn_hard_regs (&temp);
+  alternative_mask prefrred = get_preferred_alternatives (insn);
+  ira_implicitly_set_insn_hard_regs (&temp, prefrred);
   AND_COMPL_HARD_REG_SET (temp, ira_no_alloc_regs);
 
   /* If any implicit clobber registers intersect with regular ones in

diff --git a/gcc/target-globals.c b/gcc/target-globals.c
index e174815fc2bac8327db00f10767d29d58ab6393b..8bc44ca1310be00424623069642feb34c17b3d15 100644 (file)
--- a/gcc/target-globals.c
+++ b/gcc/target-globals.c
@@ -44,6 +44,7 @@ along with GCC; see the file COPYING3.  If not see
 #include "cfgloop.h"
 #include "ira.h"
 #include "alloc-pool.h"
+#include "recog.h"
 #include "ira-int.h"
 #include "builtins.h"
 #include "gcse.h"

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index c00d81cf033006c4cded432134b7ff96a160b335..8aba7c0351d496d4274cc47f3891350106df7e4d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2015-08-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR rtl-optimization/67029
+       * gcc.dg/pr67029.c: New test.
+
 2015-08-07  Francois-Xavier Coudert  <fxcoudert@gcc.gnu.org>
 
        PR fortran/64104

diff --git a/gcc/testsuite/gcc.dg/pr67029.c b/gcc/testsuite/gcc.dg/pr67029.c
new file mode 100644 (file)
index 0000000..f0023e5
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pr67029.c
@@ -0,0 +1,14 @@
+/* { dg-do compile { target { int128 && scheduling } } } */
+/* { dg-options "-O2 -fschedule-insns" } */
+/* { dg-additional-options "-fstack-protector" { target fstack_protector } } */
+
+extern void fn2 (char *);
+__int128 a, b;
+int
+fn1 (void)
+{
+  char e[32];
+  fn2 (e);
+  b = 9 * (a >> 1);
+  return 0;
+}