CPU: Get rid of the now unnecessary getInst/setInst family of functions.

This code is no longer needed because of the preceeding change which adds a
StaticInstPtr parameter to the fault's invoke method, obviating the only use
for this pair of functions.

diff --git a/src/cpu/checker/cpu_impl.hh b/src/cpu/checker/cpu_impl.hh
index 494298cadab54fd365075fe4e8fe02c92050eb97..10a9d117764725b11c30c5faf1d9593ff3202e31 100644 (file)
--- a/src/cpu/checker/cpu_impl.hh
+++ b/src/cpu/checker/cpu_impl.hh
@@ -209,10 +209,6 @@ Checker<DynInstPtr>::verify(DynInstPtr &completed_inst)
                                                          thread->getTC()));
 #endif
 
-#if FULL_SYSTEM
-            thread->setInst(machInst);
-#endif // FULL_SYSTEM
-
             fault = inst->getFault();
         }
 

diff --git a/src/cpu/checker/thread_context.hh b/src/cpu/checker/thread_context.hh
index ef7d4c6430de7c8b34f1eb2c41b8c3c15e1dbb1f..5bd3ed734cd686c1114d4106c6ffc83f5ed90410 100644 (file)
--- a/src/cpu/checker/thread_context.hh
+++ b/src/cpu/checker/thread_context.hh
@@ -153,9 +153,6 @@ class CheckerThreadContext : public ThreadContext
 
     int threadId() { return actualTC->threadId(); }
 
-    // @todo: Do I need this?
-    MachInst getInst() { return actualTC->getInst(); }
-
     // @todo: Do I need this?
     void copyArchRegs(ThreadContext *tc)
     {

diff --git a/src/cpu/inorder/thread_context.cc b/src/cpu/inorder/thread_context.cc
index c7a500a639bbe43dd9f4c3dca9d311673f50caa5..e6d0af2cc90fa36986f4d03c35681aa98de7b47c 100644 (file)
--- a/src/cpu/inorder/thread_context.cc
+++ b/src/cpu/inorder/thread_context.cc
@@ -171,12 +171,6 @@ InOrderThreadContext::unserialize(Checkpoint *cp, const std::string &section)
     panic("unserialize unimplemented");    
 }
 
-TheISA::MachInst
-InOrderThreadContext:: getInst()
-{
-    return thread->getInst();
-}
-
 
 void
 InOrderThreadContext::copyArchRegs(ThreadContext *src_tc)

diff --git a/src/cpu/inorder/thread_context.hh b/src/cpu/inorder/thread_context.hh
index 3ed2e7f50fcc01a9f4915b79d6b31687aad80717..0c0f563c076ba0b582987513d7d190ef5392e0be 100644 (file)
--- a/src/cpu/inorder/thread_context.hh
+++ b/src/cpu/inorder/thread_context.hh
@@ -177,11 +177,6 @@ class InOrderThreadContext : public ThreadContext
     /** Returns this thread's ID number. */
     int getThreadNum() { return thread->readTid(); }
 
-    /** Returns the instruction this thread is currently committing.
-     *  Only used when an instruction faults.
-     */
-    TheISA::MachInst getInst();
-
     /** Copies the architectural registers from another TC into this TC. */
     void copyArchRegs(ThreadContext *src_tc);
 

diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 468781e4d3326e92d00d368bc5b2e4fff39af726..87f18d4e4cff72e106a62d4054809a6d41295431 100644 (file)
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -1033,12 +1033,6 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
     }
 #endif
 
-    // DTB will sometimes need the machine instruction for when
-    // faults happen.  So we will set it here, prior to the DTB
-    // possibly needing it for its fault.
-    thread[tid]->setInst(
-        static_cast<TheISA::MachInst>(head_inst->staticInst->machInst));
-
     if (inst_fault != NoFault) {
         DPRINTF(Commit, "Inst [sn:%lli] PC %#x has a fault\n",
                 head_inst->seqNum, head_inst->readPC());

diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh
index 78b2660146c99b2309496d34187bf6584948af49..b7790cfda49af04ff53655267868a43ab1bd1c6b 100755 (executable)
--- a/src/cpu/o3/thread_context.hh
+++ b/src/cpu/o3/thread_context.hh
@@ -151,10 +151,6 @@ class O3ThreadContext : public ThreadContext
     /** Samples the function profiling information. */
     virtual void profileSample();
 #endif
-    /** Returns the instruction this thread is currently committing.
-     *  Only used when an instruction faults.
-     */
-    virtual TheISA::MachInst getInst();
 
     /** Copies the architectural registers from another TC into this TC. */
     virtual void copyArchRegs(ThreadContext *tc);

diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh
index a1a96933a896ecc83411c83a8541e8dd65178dbf..0b7a2b1727e802bc2e26b273864501b44716099d 100755 (executable)
--- a/src/cpu/o3/thread_context_impl.hh
+++ b/src/cpu/o3/thread_context_impl.hh
@@ -215,13 +215,6 @@ O3ThreadContext<Impl>::profileSample()
 }
 #endif
 
-template <class Impl>
-TheISA::MachInst
-O3ThreadContext<Impl>:: getInst()
-{
-    return thread->getInst();
-}
-
 template <class Impl>
 void
 O3ThreadContext<Impl>::copyArchRegs(ThreadContext *tc)

diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index fba5886f85fa11bf6fcfe5b95ea74cb464b91c3c..ad23b2790f1dd5eebedbc21b1b207f87d7501e7b 100644 (file)
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -171,9 +171,6 @@ class OzoneCPU : public BaseCPU
 
         int threadId();
 
-        // Also somewhat obnoxious.  Really only used for the TLB fault.
-        TheISA::MachInst getInst();
-
         void copyArchRegs(ThreadContext *tc);
 
         void clearArchRegs();

diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index c09dd9046fd5278a649976217a0d117dfe257045..08da1724bbc737d13c598c136cee90a11ce2854f 100644 (file)
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -771,7 +771,6 @@ OzoneCPU<Impl>::OzoneTC::takeOverFrom(ThreadContext *old_context)
     setCpuId(old_context->cpuId());
     setContextId(old_context->contextId());
 
-    thread->setInst(old_context->getInst());
 #if !FULL_SYSTEM
     setFuncExeInst(old_context->readFuncExeInst());
 #else
@@ -862,13 +861,6 @@ OzoneCPU<Impl>::OzoneTC::threadId()
     return thread->threadId();
 }
 
-template <class Impl>
-TheISA::MachInst
-OzoneCPU<Impl>::OzoneTC::getInst()
-{
-    return thread->getInst();
-}
-
 template <class Impl>
 void
 OzoneCPU<Impl>::OzoneTC::copyArchRegs(ThreadContext *tc)

diff --git a/src/cpu/ozone/inorder_back_end_impl.hh b/src/cpu/ozone/inorder_back_end_impl.hh
index 2d4d225c7494ff605f011a2d7937b7ed57882649..b48e8f6924e15fee6f66befaf1a244b66b9b57c0 100644 (file)
--- a/src/cpu/ozone/inorder_back_end_impl.hh
+++ b/src/cpu/ozone/inorder_back_end_impl.hh
@@ -304,12 +304,6 @@ InorderBackEnd<Impl>::executeInsts()
 
             thread->inSyscall = true;
 
-            // Hack for now; DTB will sometimes need the machine instruction
-            // for when faults happen.  So we will set it here, prior to the
-            // DTB possibly needing it for this translation.
-            thread->setInst(
-                static_cast<TheISA::MachInst>(inst->staticInst->machInst));
-
             // Consider holding onto the trap and waiting until the trap event
             // happens for this to be executed.
             inst_fault->invoke(xc);

diff --git a/src/cpu/ozone/lw_back_end_impl.hh b/src/cpu/ozone/lw_back_end_impl.hh
index cbc386cb0fff49e87651d9524f4cb572d3247cf7..465fccbdbd5d895b4355ebbe97a123abcb9a27a4 100644 (file)
--- a/src/cpu/ozone/lw_back_end_impl.hh
+++ b/src/cpu/ozone/lw_back_end_impl.hh
@@ -1171,9 +1171,6 @@ LWBackEnd<Impl>::commitInst(int inst_num)
         }
 #endif
 
-        thread->setInst(
-            static_cast<TheISA::MachInst>(inst->staticInst->machInst));
-
         handleFault(inst_fault);
         return false;
     }

diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 98feb8bf5560e1db948ca3933d728ebfc1d0614a..088d5ff16f8b1fc547e1afaef3c0a669f3970fae 100644 (file)
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -456,10 +456,6 @@ BaseSimpleCPU::preExecute()
         DPRINTF(Decode,"Decode: Decoded %s instruction: 0x%x\n",
                 curStaticInst->getName(), curStaticInst->machInst);
 #endif // TRACING_ON
-
-#if FULL_SYSTEM
-        thread->setInst(inst);
-#endif // FULL_SYSTEM
     }
 }
 

diff --git a/src/cpu/simple_thread.cc b/src/cpu/simple_thread.cc
index ad69719eea9e2c52cdf767cb14251450510a9b81..40f7f3cdb79148711761d0e95664fe4e47f63caa 100644 (file)
--- a/src/cpu/simple_thread.cc
+++ b/src/cpu/simple_thread.cc
@@ -181,7 +181,6 @@ SimpleThread::copyState(ThreadContext *oldContext)
 #if !FULL_SYSTEM
     funcExeInst = oldContext->readFuncExeInst();
 #endif
-    inst = oldContext->getInst();
 
     _threadId = oldContext->threadId();
     _contextId = oldContext->contextId();

diff --git a/src/cpu/thread_context.hh b/src/cpu/thread_context.hh
index 84ef579225e3629c6ca2c0758ec2d8e0b25963f3..3d7be52566eebe3fb0b2ad74e6f5ecaec77e2a1d 100644 (file)
--- a/src/cpu/thread_context.hh
+++ b/src/cpu/thread_context.hh
@@ -171,10 +171,6 @@ class ThreadContext
     virtual void profileSample() = 0;
 #endif
 
-    // Also somewhat obnoxious.  Really only used for the TLB fault.
-    // However, may be quite useful in SPARC.
-    virtual TheISA::MachInst getInst() = 0;
-
     virtual void copyArchRegs(ThreadContext *tc) = 0;
 
     virtual void clearArchRegs() = 0;
@@ -352,8 +348,6 @@ class ProxyThreadContext : public ThreadContext
     void profileClear() { return actualTC->profileClear(); }
     void profileSample() { return actualTC->profileSample(); }
 #endif
-    // @todo: Do I need this?
-    MachInst getInst() { return actualTC->getInst(); }
 
     // @todo: Do I need this?
     void copyArchRegs(ThreadContext *tc) { actualTC->copyArchRegs(tc); }

diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index c62a7a3beba1957f6b9ada599f861b903674dfa4..dedeccb3e8304cf1e40251ff90b3bc8a92493b88 100644 (file)
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -75,7 +75,6 @@ ThreadState::serialize(std::ostream &os)
     SERIALIZE_ENUM(_status);
     // thread_num and cpu_id are deterministic from the config
     SERIALIZE_SCALAR(funcExeInst);
-    SERIALIZE_SCALAR(inst);
 
 #if FULL_SYSTEM
     Tick quiesceEndTick = 0;
@@ -94,7 +93,6 @@ ThreadState::unserialize(Checkpoint *cp, const std::string &section)
     UNSERIALIZE_ENUM(_status);
     // thread_num and cpu_id are deterministic from the config
     UNSERIALIZE_SCALAR(funcExeInst);
-    UNSERIALIZE_SCALAR(inst);
 
 #if FULL_SYSTEM
     Tick quiesceEndTick;

diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index cf637aedafc941eb6cd8436d11f6afd1860a92b3..06707894df51c7d069a5b024a205e81a0ae25cea 100644 (file)
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -122,12 +122,6 @@ struct ThreadState {
     void setMemPort(TranslatingPort *_port) { port = _port; }
 #endif
 
-    /** Sets the current instruction being committed. */
-    void setInst(TheISA::MachInst _inst) { inst = _inst; }
-
-    /** Returns the current instruction being committed. */
-    TheISA::MachInst getInst() { return inst; }
-
     /** Reads the number of instructions functionally executed and
      * committed.
      */
@@ -205,11 +199,6 @@ struct ThreadState {
     Process *process;
 #endif
 
-    /** Current instruction the thread is committing.  Only set and
-     * used for DTB faults currently.
-     */
-    TheISA::MachInst inst;
-
   public:
     /**
      * Temporary storage to pass the source address from copy_load to