Adjust hwacha misaligned instruction test to ignore lower 2 bits in comparisons to...

diff --git a/isa/rv64sv/ma_vt_inst.S b/isa/rv64sv/ma_vt_inst.S
index cd7762dc325ca3bcf1dbb2cdaa179c236a8fe384..d772041263dbb1462c9b3053b133574f417e6a15 100644 (file)
--- a/isa/rv64sv/ma_vt_inst.S
+++ b/isa/rv64sv/ma_vt_inst.S
@@ -48,6 +48,8 @@ handler:
   # check badvaddr
   vxcptaux a3
   la a4,vtcode1+2
+  andi a3, a3, -4 # mask off lower bits so that may
+  andi a4, a4, -4 # ignore impl. specific behavior
   bne a3,a4,fail
 
   # make sure vector unit has cleared out